Lattice Semiconductor MachXO2 Breakout Board, User Manual

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MachXO2 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2014-202
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Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal .
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-EB-02051-2.3
Table 7.5. Expansion Header Pin Information (J4)
Header Pin Number -1200ZE Function -7000HE Function MachXO2 Pin
1 VCC_3.3V VCC_3.3V —
2 VCCIO3 VCCIO3/4/5 30(VCCIO3), 16(VCCIO4),
7(VCCIO5)
3 VCC_3.3V VCC_3.3V —
4 NC NC —
5 PL2A / L_GPLLT_FB PL3A / L_GPLLT_FB 1
6 PL2B / L_GPPLC_FB PL3B / L_GPPLC_FB 2
7 PL2C / L_GPLLT_IN PL4A / L_GPLLT_IN 3
8 PL2D / L_GPLLC_IN PL4B / L_GPLLC_IN 4
9 PL3A / PCLKT3_2 PL6A / PCLKT5_0 5
10 PL3B / PCLKC3_2 PL6B / PCLKC5_0 6
11 PL3C PL8A 9
12 PL3D PL8B 10
13 GND GND —
14 GND GND —
15 PL4A PL9A 11
16 PL4B PL9B 12
17 PL4C PL10A 13
18 PL4D PL10B 14
19 GND GND —
20 GND GND —
21 PL5A / PCLKT3_1 PL12A / PCLKT4_0 19
22 PL5B / PCLKC3_1 PL12B / PCLKC4_0 20
23 PL5C PL15A 21
24 PL5D PL15B 22
25 GND GND —
26 GND GND —
27 PL8A PL17A 23
28 PL8B PL17B 24
29 PL8C PL19A 25
30 PL8D PL19B 26
31 GND GND —
32 GND GND —
33 PL9A / PCLKT3_0 PL22A / PCLKT3_0 27
34 PL9B / PCLKC3_0 PL22B / PCLKC3_0 28
35 GND GND —
36 GND GND —
37 PL10A PL24A 32
38 PL10B PL24B 33
39 PL10C PL25A 34
40 PL10D PL25B 35