Lattice Semiconductor EVDK, User Manual

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EVDK GigE Vision Demo
User Guide
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8 FPGA-UG-02100-1.0
2. Demo Board Setup
To perform the GigE video streaming demo, replace the HDMI VIP Output Bridge Board with the USB3-GbE VIP IO
Board, as shown in
Figure 2.1 .
1. 2. 3.
CrossLink VIP Input
Bridge Board
ECP5 Video
Processor Board
USB3-GbE
VIP I/O Board
Figure 2.1. Required Board Configuration for the USB3 and GigE Video Streaming Demo
To configure the board:
1. Remove power from the EVDK.
2. Remove the HDMI VIP Output Bridge Board.
3. Install the USB3-GbE VIP IO Board.
a. Connect J1 (60-pin) connector to J12 of the ECP5 VIP Processor Board.
b. Connect J2 (60-pin) connector to J13 of the ECP5 VIP Processor Board.
For pin information details, refer to High-Speed Connectors section of USB3-GigE VIP IO Board User Guide (FPGA-
EB-02016) .
4. Erase the SRAM and Flash of both the ECP5 device and the CrossLink device before proceeding.
a. Erase the SRAM of the ECP5 and the CrossLink devices
b. Erase SPI Flash of the ECP5 and the CrossLink devices
5. Power up the EVDK.
6. Program the SPI flash with the bitstream files as indicated in Table 2.1 .
Table 2.1. Bitstream Files
Device Bitstream file
ECP5UM GE_Vision_ECP5.bit
CrossLink GE_Vision_crosslink.bit
Note: For steps how to program, please refer to Demo Requirements and Appendix B section of Lattice Embedded
Vision Development Kit (FPGA-UG-02015) .
7. Remove power from the EVDK.
8. Plugin the Ethernet cable to J3.
9. Power up the EVDK.