ML7345 Family LSIs Hardware Deaign Manual
15
8.4. 470
～
510MHz(ML7345C)
[Note]
· The XIN (#5) pin should be OPEN when using TCXO.
Thick line is Zo=50 ohm.
ANTENNA
About the peripheral parts of pin#5 and pin#6 ,
please refer the section 2 and section 9.
C3
1000pF
C2
10pF
C1
N.M.
C50
0Ω
R4
N.M.
C36
0.1uF
Power Supply
3.3V
C6
Place LC tank on surface as close to LSI
pin as possible.
VDD_RF VB_EXT VDD_VCO REG_OUT
VDD_CP
VBG REG_CORE VDD_REG
(25) (31) (32) (3)
(27) (2) (4) (1)
R3
6.8kΩ
C37
1uF
X1
IC1
ML7345C
LP
(26)
PA_OUT(20)
LNA_P(24)
IND2
GND_VCO
IND1
(30) (29)
(28)
Back side is GND PAD
VDDIO(9)
XIN XOUT
(5) (6)
A_MON(23)
C33
1000pF
C27
1000pF
C41
100pF
L2
27nH
L3
12nH
C45
100pF
C48
0
Ω
L5
23nH
C47
0.5pF
L1
33nH
C5
C4
C17
0.1uF
C22
1000pF
C15
0.1uF
C21
0.1uF
L7
33nH
C49
0.3pF
VDD_PA(22)
REG_PA(21)
C38
1000pF
L9
23nH
N.C.
(7)
SDI(15)
SDO(12)
SCLK(13)
SCEN(14)
GPIO0(16)
EXT_CLK(10)
RESETN(8)
GPIO2(18)
GPIO1(17)
GPIO3(19)
REGPDIN(11)
C31
0.1uF
C19
1uF
C51
1.8pF
Digital
I/O
L4
0
Ω
L6
6.8pF
L8
6.8pF.
TCXO
IC2
R11
C13
10uF
