48
CHAPTER 5:
Computer Interface Operation
Model 648 Electromagnet Power Supply
5.2.5.1 Standard Event Status Register Set
The Standard Event Status Register reports the following interface related instru-
ment events: power on detected, command syntax errors, command execution errors,
query errors, operation complete. Any or all of these events may be reported in the
standard event summary bit through the enable register (FIGURE 5-2). The Standard
Event Status Enable command (*ESE) programs the enable register and the query
command (*ESE?) reads it. *ESR? reads and clears the Standard Event Status Register.
The used bits of the Standard Event Register are described as follows:
D
Power On (PON), Bit (7): this bit is set to indicate an instrument off-on
transition.
D
Command Error (CME), Bit (5): this bit is set if a command error has been detected
since the last reading. This means that the instrument could not interpret the
command due to a syntax error, an unrecognized header, unrecognized termina-
tors, or an unsupported command.
D
Execution Error (EXE), Bit (4): this bit is set if an execution error has been
detected. This occurs when the instrument is instructed to do something not
within its capabilities.
D
Query Error (QYE), Bit (2): this bit indicates a query error. It occurs rarely and
involves loss of data because the output queue is full.
D
Operation Complete (OPC), Bit (0): when *OPC is sent, this bit will be set when the
instrument has completed all pending operations. The operation of this bit is not
related to the *OPC? command, which is a separate interface feature
(section 5.2.7.6).
Standard event status register
Name
Name
Bit
Bit
AND
CME
5
Not
PON
*ESE, *ESE?
used
Standard Event
Status Enable
7
6
Not
OPC
Not
EXE
QYE
used
used
2
4
3
AND
1
0
AND
CME
5
6
7
Standard Event
*ESR?
Status Register
AND
PON
used
Not
0
1
3
4
2
QYE
AND
EXE
used
Not
used
Not
OPC
OR
To bit 5 (ESB) of
Status Byte Register
(see Figure 5-1.)
5.2.5.2 Operation Event Register Set
The Operation Event Register reports the following instrument events: ramp done,
compliance. Any or all of these events may be reported in the operation event sum-
mary bit through the enable register, see Figure 5-3. The Operation Event Enable
command (OPSTE) programs the enable register and the query command (OPSTE?)
reads it. OPSTR? reads the Operation Event Register. OPST? reads and clears the Oper-
ation Condition register. The used bits of the Operation Event Register are described
as follows:
D
Power Limit, Bit (2): this bit is set if the output is in power limit.
D
Ramp Done, Bit (1): this bit is set when the output current ramp is completed.
D
Compliance, Bit (0): this bit is set if the output is in compliance limit.
FIGURE 5-3
