124
c
HAPTER
6:
Computer Interface Operation
Model 372 AC Resistance Bridge and Temperature Controller
6.2.4 Status System
Overview
The Model 372 implements a status system compliant with the IEEE-488.2 standard.
The status system provides a method of recording and reporting instrument informa-
tion and is typically used to control the Service Request (SRQ) interrupt line. A dia-
gram of the status system is shown in FIGURE 6-1. The status system is made up of
status register sets, the status byte register, and the service request enable register.
Each register set consists of two types of registers: event and enable.
6.2.4.1 Event Registers
Each register set includes an event register as shown in FIGURE 6-1. Bits in the event
register correspond to various system events and latch when the event occurs. When
an event bit is set, subsequent events corresponding to that bit are ignored. Set bits
remain latched until the register is cleared by a query command (such as *ESR?) or a
*CLS command. The register is read-only.
6.2.4.2 Enable Registers
Each register set includes an enable register as shown in FIGURE 6-1. An enable regis-
ter determines which bits in the corresponding event register will set the summary
bit for the register set in the status byte. You may write to or read from an enable reg-
ister. Each event register bit is logically ANDed to the corresponding enable bit of the
enable register. When you set an enable register bit, and the corresponding bit is set
in the event register, the output (summary) of the register will be set, which in turn
sets the summary bit of the status byte register.
FIGURE 6-1
Model 372 status system
7
6
5
4
3
2
1
0
PON
CME
EXE
QYE
OPC
AND
OR
AND
AND
AND
AND
7
6
5
4
3
2
1
0
Standard event
Status register
*ESR?
Standard event
Status enable register
*ESE, *ESE?
PON = Power on
CME = Command error
EXE = Execution error
QYE = Query error
OPC = Operation complete
Not
used
Not
used
Not
used
PON
CME
EXE
QYE
OPC
Not
used
Not
used
Not
used
– Bit
– Name
– Bit
– Name
RQS
MSS
Generate service
request—reset by
serial poll
Read by
*STB?
7
6
5
4
3
2
1
0
RAMPS
ESB
OVLD ALARM
VRM
VRC
RAMPW
Not used
– Bit
– Name
Service request
enable register
*SRE, *SRE?
RAMPS = Sample heater ramp done bit
RQS = Service request
MSS = Master summary status bit
ESB = Event status summary bit
OVLD = Sensor overload bit
ALARM = Sensor alarming bit
VRM = Measurement input valid reading bit
VRC = Control input valid reading bit
RAMPW = Warm-up heater ramp done bit
7
6
5
4
3
2
1
0
RAMPS
MSS
ESB
RQS
OVLD ALARM
VRM
VRC
RAMPW
– Bit
– Name
Status byte register
*STB?
AND
AND
AND
OR
AND
AND
AND
D
AN