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Laird BT830-SA, Hardware Integration Manual

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BT830 Hardware Integration Guide   

Version 1.3 

 

 

Embedded Wireless Solutions Support Center:   
http://ews-support.lairdtech.com 
 
www.lairdtech.com/bluetooth

 

21

 

Laird Technologies 

Americas: +1-800-492-2320 

Europe: +44-1628-858-940 

Hong Kong: +852-2923-0610

 

 

 
 
 

PCM Configuration 

Configure the PCM by using PSKEY_PCM_CONFIG32 and PSKEY_PCM_LOW_JITTER_CONFIG (see your PSKey file). 
The default for PSKEY_PCM_CONFIG32 is 0x00800000.   

For example: First slot following sync is active, 13-bit linear voice format, long frame sync and interface master 
generating 256kHz PCM_CLK from 4MHz internal clock with no tri-state of PCM_OUT). 

Digital Audio Interface (I²S) 

The digital audio interface supports the industry standard formats for I²S, left-justified or right-justified. The interface 
shares the same pins as the PCM interface which means each audio bus is mutually exclusive in its usage. 

Table 12

 

lists these alternative functions. 

Figure 11

 shows the timing diagram. 

Table 12: Alternative Functions of the Digital Audio Bus Interface on the PCM Interface. 

PCM Interface 

I²S Interface 

PCM_OUT 

SD_OUT 

PCM_IN 

SD_IN 

PCM_SYNC 

WS 

PCM_CLK 

SCK 

 

Figure 13: PCM Configuration 

The internal representation of audio samples within BT830is 16-bit and data on SD_OUT is limited to 16-bit per 
channel. 

Summary of Contents for BT830-SA

Page 1: ...dule Hardware Integration Guide HIG Version 1 3 BT830 SA BT830 ST Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 Embedded Wireless Solutions Support Center http ews support lairdtech com www lairdtech com bluetooth ...

Page 2: ...echnologies Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 REVISION HISTORY Revision Date Changes Approved By 1 0 23 July 2014 Initial Version Jonathan Kaye 1 1 10 Nov 2014 Updated pin definitions Jonathan Kaye 1 2 10 Aug 2015 Added Tape Reel information Jonathan Kaye 1 3 30 Sept 2015 Added additional antenna information Andrew Chen ...

Page 3: ...itions 8 DC Electrical Characteristic 10 RF Characteristics 11 Interface 12 PIO 12 WLAN Coexistence Interface 12 UART Interface 13 PCM Interface 13 GCI Interface 15 Slots and Sample Formats 16 PCM Timing Information 17 PCM Slave Timing 19 PCM Slave Mode Timing Parameters 19 PCM_CLK and PCM_SYNC Generation 20 PCM Configuration 21 Digital Audio Interface I S 21 Power Supply and Regulation 23 Voltage...

Page 4: ...23 0610 Implementation Note 29 PCB Layout on Host PCB 29 Application Note for Surface Mount Modules 30 Introduction 30 Shipping 30 Reflow Parameters 32 FCC and IC Regulatory 34 Documentation Requirements 34 European Union Regulatory 37 EU Declarations of Conformity 37 BT830 SA and BT830 ST 37 Ordering Information 38 General Comments 38 Bluetooth SIG Approvals 39 Application Note Subsystem Combinat...

Page 5: ...need high performance in minimal size For maximum flexibility in systems integration the modules are designed to support a UART interface plus GPIO and additionally I2S and PCM audio interfaces These modules present an HCI interface and have native support for Windows and Linux Bluetooth software stacks All BT830 series devices are fully qualified as Bluetooth Hardware Controller Subsystem product...

Page 6: ...and UART interfaces Up to four general purpose I Os are available for general use such as Wi Fi coexistence or general indicators Note The purpose of the SPI interface is to access the module s inner settings such as selecting different WLAN CO EXIST scheme The SPI interface can also be used to place the module in RF test mode You cannot use the module over the SPI interface for normal operation a...

Page 7: ...le by VDD_PADS Operational Modes HCI Host Controller Interface over UART Coexistence 802 11 Wi Fi 3 wire CSR schemes supported Unity 3 and Unity 3e Supply Voltage Supply 3 3V 10 Note See Implementation Note for details on different DC power selections on the BT830 Power Consumption Current Idle Mode 4 3 mA Master ACL link No traffic File Transfer 7 1 mA Master ACL link Transmit Antenna Option Inte...

Page 8: ...tate with weak internal pull up VDD_PADS UART data output active high NC 6 UART_CTS Bidirectional tri state with weak internal pull up VDD_PADS UART clear to send active low NC 7 UART_RX Bidirectional tri state with weak internal pull up VDD_PADS UART data input active high NC 8 VREG_EN_RST Input with strong internal pull down VDD_PADS Take high to enable internal regulators Also acts as active lo...

Page 9: ... GND GND Ground GND 24 PIO0 32K_CLK_IN Bidirectional tri state with weak internal pull down VDD_PADS Programmable input output line and 32kHz sleep clock input NC 25 PIO1 BT_ACTIVE Bidirectional tri state with weak internal pull down VDD_PADS Programmable input output line Wi Fi and BT 3 wire coexistance NC 26 PIO9 BT_PRIORITY Bidirectional tri state with weak internal pull down VDD_PADS Programma...

Page 10: ...7 2 0 V VDD_PADS 0 4 3 6 V Other terminal voltages 0 4 VDD_PADS 0 4 V V Table 4 Recommended operating conditions Rating Min Max Unit Operating temperature 30 85 C VREG_IN_HV 3 0 3 6 V VREG_OUT_HV 1 75 1 95 V VDD_PADS 1 75 3 6 V VREG_EN_RST VDD_PADS VDD_PADS V Table 5 High voltage Linear Regulator Normal Operation Min Typ Max Unit Input voltage VREG_IN_HV 3 0 3 3 3 6 V Output voltage VREG_OUT_HV 1 ...

Page 11: ...µA Strong pull down 10 40 150 µA Weak pull up 5 1 0 0 33 µA Weak pull down 0 33 1 0 5 0 µA CI input capacitance 1 0 5 0 pF Table 7 Current Consumption Normal Operation Avg Unit Idle 5 mA Inquiry 891 µA File Transfer ACL Transmit Master 7 1 mA Receive Slave 11 5 mA LE Connected Master 292 µA LE Scan Master 448 µA Current consumption values are taken with VREG_IN_HV pin 3 15V RF TX power set to 0dBm...

Page 12: ...c Unit Sensitivity for 0 1 BER DH1 87 70 dBm DH3 87 dBm DH5 87 dBm 2 DH5 91 dBm 3 DH5 85 dBm Sensitivity variation over BT band All 3 dB Sensitivity variation over temperature range All TBD dB INTERFACE PIO PIO lines are configured through software to have either weak or strong pull ups or pull downs All PIO lines are configured as inputs with weak pull downs at reset and have additional individua...

Page 13: ...With a standard PC an accelerated serial port adapter card is required to communicate with the UART at its maximum data rate PCM Interface The audio PCM interface on the BT830 supports the following Continuous transmission and reception of PCM encoded audio data over Bluetooth Processor overhead reduction through hardware support for continual transmission and reception of PCM data A bidirectional...

Page 14: ...g Frame Sync shown with 8 bit Companded Sample Long Frame Sync indicates a clocking format that controls the transfer of PCM data words or samples In Long Frame Sync the rising edge of PCM_SYNC indicates the start of the PCM word When the BT830 is configured as PCM master generating PCM_SYNC and PCM_CLK then PCM_SYNC is eight bits long When the BT830 is configured as PCM Slave PCM_SYNC is from one...

Page 15: ...ge of PCM_CLK and transmits PCM_OUT on the rising edge PCM_OUT is configurable as high impedance on the falling edge of PCM_CLK in the LSB position or on the rising edge Multi Slot Operation More than one SCO connection over the PCM interface is supported using multiple slots Up to three SCO connections are carried over any of the first four slots Figure 6 Multi slot operation with 2 Slots and 8 b...

Page 16: ... following each sync pulse Slot durations are either 8 or 16 clock cycles 8 clock cycles for 8 bit sample formats 16 clock cycles for 8 bit 13 bit or 16 bit sample formats BT830 supports 13 bit linear 16 bit linear and 8 bit µ law or A law sample formats A sample rate of 8 ksps Little or big endian bit order For 16 bit slots the three or eight unused bits in each slot are filled with sign extensio...

Page 17: ...tdmclksynch Delay time from PCM_CLK high to PCM_SYNC high 4MHz DDS generation 20 ns 48MHz DDS generation 40 83 ns tdmclkpout Delay time from PCM_CLK high to valid PCM_OUT 20 ns tdmclklsyncl Delay time from PCM_CLK low to PCM_SYNC low long frame sync only 4MHz DDS generation 20 ns 48MHz DDS generation 40 83 ns a Assumes normal system clock operation Figures vary during low power modes when system c...

Page 18: ...Solutions Support Center http ews support lairdtech com www lairdtech com bluetooth 18 Laird Technologies Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 Figure 9 PCM Master Timing Long Frame Sync Figure 10 PCM Master Timing Short Frame Sync ...

Page 19: ...ime 200 ns PCM Slave Mode Timing Parameters Symbol Parameter Min Typ Max Unit thsclksynch Hold time from PCM_CLK low to PCM_SYNC high 2 ns tsusclksynch Set up time for PCM_SYNC high to PCM_CLK low 20 ns tdpout Delay time from PCM_SYNC or PCM_CLK whichever is later to valid PCM_OUT data long frame sync only 15 ns tdsclkhpout Delay time from CLK high to PCM_OUT valid data 15 ns tdpoutz Delay time fr...

Page 20: ...s a greater range of frequencies to be generated with low jitter but consumes more power To select this second method set bit to 48M_PCM_CLK_GEN_EN in PSKEY_PCM_CONFIG32 When in this mode and with long frame sync the length of PCM_SYNC is either 8 or 16 cycles of PCM_CLK determined by LONG_LENGTH_SYNC_EN in PSKEY_PCM_CONFIG32 Equation 0 1 describes PCM_CLK frequency when generated from the interna...

Page 21: ...rating 256kHz PCM_CLK from 4MHz internal clock with no tri state of PCM_OUT Digital Audio Interface I S The digital audio interface supports the industry standard formats for I S left justified or right justified The interface shares the same pins as the PCM interface which means each audio bus is mutually exclusive in its usage Table 12 lists these alternative functions Figure 11 shows the timing...

Page 22: ... Min Typ Max Unit tssu WS valid to SCK high set up time 20 ns tsh SCK high to WS invalid hold time 2 5 ns topd SCK low to SD_OUT valid delay time 20 ns tisu SD_IN valid to SCK high set up time 20 ns tih SCK high to SD_IN invalid hold time 2 5 ns Figure 14 Digital Audio Interface Slave Timing Table 15 Digital Audio Interface Master Timing Symbol Parameter Min Typ Max Unit SCK Frequency 6 2 MHz WS F...

Page 23: ... VREG_OUT_HV to generate the internal voltage for the system Be sure to left Pin 9 un connected in this method In this case the VDD_PADS can only be set at 1 8V Note The I O signal voltage level VDD_PADS should be equal or less than the power supply mentioned voltage above Voltage Regulator Enable and Reset A single pin VREG_EN_RST controls both the high voltage linear regulator enables and the di...

Page 24: ...et Via a software configured watchdog timer A warm reset function is also available under software control After a warm reset the RAM data remains available Power Sequencing CSR recommends that all power supplies are powered at the same time The order of powering the supplies relative to the I O supply VDD_PADS to VREG_IN_HV or VREG_OUT_HV is not important ANTENNA PERFORMANCE Multilayer Chip Anten...

Page 25: ... ews support lairdtech com www lairdtech com bluetooth 25 Laird Technologies Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 XZ plane YZ plane Peak gain Avg gain XY plane 2 2 5 9 Peak gain Avg gain XZ plane 0 7 5 0 Peak gain Avg gain YZ plane 1 3 3 7 Unit dBi X Y Z Y Z X ...

Page 26: ...pe 44 1628 858 940 Hong Kong 852 2923 0610 NanoBlade The following describes the performance of the NanoBlue antenna EBL2449A1 15UFL Parameter Performance Frequency Range 2 4 2 5 GHz Gain 2 0 dBi Polarization Linear Impedance 50 ohms VSWR 2 0 1 Dimensions L x W x H 1 88 in x 5 in x 032 in Weight 2 grams XY plane XZ plane YZ plane MECHANICAL DIMENSIONS AND LAND PATTERN BT830 SA Mechanical Drawing ...

Page 27: ...s Support Center http ews support lairdtech com www lairdtech com bluetooth 27 Laird Technologies Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 Note Dimensions are in millimetres mm Tolerances xx 0 03 mm for PCB PAD 0 15mm for module size x 1 3 mm ...

Page 28: ...er http ews support lairdtech com www lairdtech com bluetooth 28 Laird Technologies Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 BT830 ST Mechanical Drawing Note Dimensions are in millimetres mm Tolerances xx 0 03 mm for PCB PAD 0 15mm for module size x 1 3 mm ...

Page 29: ... the edge of the host PCB preferably in the corner with the antenna facing the corner A different host PCB thickness dielectric will have small effect on antenna Figure 18 Recommend Antenna keep out area in White used on the BT830 SA Antenna Keep out and Proximity to Metal or Plastic Checklist for metal plastic enclosure Minimum safe distance for metals without seriously compromising the antenna t...

Page 30: ...h on Pin 8 VREG_EN_RST to turn on the internal regulator APPLICATION NOTE FOR SURFACE MOUNT MODULES Introduction Laird surface mount modules are designed to conform to all major manufacturing guidelines This application note is intended to provide additional guidance beyond the information that is presented in the user manual This application note is considered a living document and is updated as ...

Page 31: ... 31 Laird Technologies Americas 1 800 492 2320 Europe 44 1628 858 940 Hong Kong 852 2923 0610 Tape and Reel Package Information Note Ordering information for Tape and Reel packaging is an addition of T R to the end of the full module part number For example BT830 becomes BT830 Sx xx T R Figure 20 Reel specifications Figure 21 Tape specifications ...

Page 32: ...ent If directed to bake units on the card see Table 17 and follow instructions specified by IPC JEDEC J STD 033 A copy of this standard is available from the JEDEC website http www jedec org sites default files docs jstd033b01 pdf Note The shipping tray cannot be heated above 65 C If baking is required at the higher temperatures displayed in in Table 17 the modules must be removed from the shippin...

Page 33: ...ratures Important During reflow modules should not be above 260 and not for more than 30 seconds Figure 0 23 Recommended Reflow Temperature Temperatures should not exceed the minimums or maximums presented in Table 18 Table 18 Recommended Maximum and minimum temperatures Specification Value Unit Temperature Inc Dec Rate max 1 3 C Sec Temperature Decrease rate goal 2 4 C Sec Soak Temp Increase rate...

Page 34: ...must place Contains FCC ID SQG BT830 on the host product in such a location that it can be seen by an operator at the time of purchase User s Guide Requirements The BT830 complies with FCC Part 15 Rules for a Modular Approval To leverage Laird s grant the conditions below must be met for the host device into which the BT830 is integrated The transmitter module is not co located with any other tran...

Page 35: ... Reorient or relocate the receiving antenna 2 Increase the separation between the equipment and receiver 3 Connect the equipment into an outlet on a circuit different from that to which the receiver is connected 4 Consult the dealer or an experienced radio TV technician for help FCC Caution Any changes or modifications not expressly approved by the party responsible for compliance could void the u...

Page 36: ...cessary for successful communication Conformément à la réglementation d Industrie Canada le présent émetteur radio peut fonctionner avec une antenne d un type et d un gain maximal ou inférieur approuvé pour l émetteur par Industrie Canada Dans le but de réduire les risques de brouillage radioélectrique à l intention des autres utilisateurs il faut choisir le type d antenne et son gain de sorte que...

Page 37: ...95 5 EC Conformity Assessment Annex IV Reference standards used for presumption of conformity Article Number Requirement Reference standard s 3 1a Health and Safety EN60950 1 2006 A11 2009 A1 2010 A12 2011 3 1b Protection requirements with respect to electromagnetic compatibility EN 301 489 1 V1 9 2 2011 09 EN 301 489 17 V2 2 1 2012 09 Emissions EN55022 2006 A1 2007 Class B Immunity EN61000 4 2 20...

Page 38: ...Europe 44 1628 858 940 Hong Kong 852 2923 0610 ORDERING INFORMATION Part Number Description BT830 SA BTv4 0 Dual Mode UART HCI Module with integrated Antenna BT830 ST BTv4 0 Dual Mode UART HCI Module Trace Pin DVK BT830 Development Kit for BT830 Module General Comments This is a preliminary datasheet Please check with Laird for the latest information before commencing a design If in doubt ask ...

Page 39: ...cedure This procedure assumes that the member is simply combining two subsystems to create a new design without any modification to the existing qualified subsystems This is achieved by using the Listing interface on the Bluetooth SIG website Figure 24 shows the basic subsystem combination of a controller and host subsystem The Controller provides the RF BB LM and HCI layers with the Host providin...

Page 40: ...act your local sales representative or our support team for further assistance Laird Technologies Connectivity Products Business Unit Support Centre http ews support lairdtech com Email wireless support lairdtech com Phone Americas 1 800 492 2320 Option 2 Europe 44 1628 858 940 Hong Kong 852 2923 0610 Web http www lairdtech com bluetooth Copyright 2014 Laird Technologies Inc All rights reserved Th...

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