Configuration
AM4100
Page 4 - 10
ID 36126, Rev. 2.0
P R E L I M I N A R Y
4.6.2
Interface Configuration Register
The Interface Configuration Register holds a series of bits defining the Ethernet, PCI Express
(PCIe) and Serial RapidIO (sRIO) configurations.
Table 4-11: Interface Configuration Register
REGISTER NAME
INTERFACE CONFIGURATION REGISTER
ADDRESS
0xEC00_0008
BIT
NAME
DESCRIPTION
RESET
VALUE
ACCESS
7
CFV
Configuration Valid:
0 = Configuration of registers not finished by MMC
1 = Configuration of registers finished by MMC
0
R
6 - 4
Res.
Reserved
000
R
3 - 1
SDT
CPU SerDes type:
000 = SerDes 1/2 disabled
001 = x4 PCIe
010 = Reserved
011 = Reserved
100 = Reserved
101 = sRIO 3.125 Gbit
110 = sRIO 1.25 Gbit
111 = sRIO 2.5 Gbit
N/A
R
0
SC
CPU SerDes configuration:
0 = PCIe end point / sRIO slave
1 = PCIe route complex / sRIO master
N/A
R
Summary of Contents for AM4100
Page 19: ...AM4100 Introduction ID 36126 Rev 2 0 Page 1 1 Introduction Chapter 1 1 P R E L I M I N A R Y...
Page 57: ...AM4100 Installation ID 36126 Rev 2 0 Page 3 1 Installation Chapter 1 3 P R E L I M I N A R Y...
Page 65: ...AM4100 Configuration ID 36126 Rev 2 0 Page 4 1 Configuration Chapter 1 4 P R E L I M I N A R Y...
Page 89: ...AM4100 NetBootLoader ID 36126 Rev 2 0 Page 5 1 NetBootLoader Chapter 1 5 P R E L I M I N A R Y...
