AM4011
Configuration
ID 1022-1626, Rev. 1.0
Page 4 - 13
P R E L I M I N A R Y
4.4.10
Board Interrupt Configuration Register
The Board Interrupt Configuration Register holds a series of bits defining the interrupt routing
for the Watchdog. If the Watchdog Timer fails, it can generate an IRQ5 interrupt.
4.4.11
Hot Swap Status Register
The hot swap status register describes the AMC hot swap handle status.
Table 4-17: Board Interrupt Configuration Register
REGISTER NAME
BOARD INTERRUPT CONFIGURATION REGISTER
ADDRESS
0x289
BIT
NAME
DESCRIPTION
RESET
VALUE
ACCESS
7-2
Res.
Reserved
000000
R
1-0
WIRQ
Watchdog interrupt configuration
00 = Disabled
01 = IRQ5
10 = Reserved
11 = Reserved
00
R/W
Table 4-18: Hot Swap Status Register
REGISTER NAME
HOT SWAP STATUS REGISTER
ADDRESS
0x28A
BIT
NAME
DESCRIPTION
RESET
VALUE
ACCESS
7
Res.
Reserved
0
R
6
HSH
AMC hot swap handle status
0 = AMC hot swap handle in closed position
1 = AMC hot swap handle in open position
N/A
R
5-0
Res.
Reserved
000000
R
