BOARD Controller ---- 35
8.3 F_UART
This is the register of UART in FPGA. F_UART is linked to Touch Panel (at the fixed baud rate of 19200 bps). Word Length
is fixed to 8-bits long. The register assignment is 16550-compatible. Interrupt signals are linked to the GPIO1_1 line.
RBR
Address :
0xB400
1050
Access
: 8bit Read
Bit No.
Description
7-0 Received
data
Enabled
with
DLAB=0.
THR
Address :
0xB400
1050
Access
: 8bit Write
Bit No.
Description
7-0 Transmitted
data
Enabled with DLAB=0.
IER
Address :
0xB400
1051
Access
: 8bit Read/Write
Bit No.
Description
7-3 Reserved
2
Receiver Line Status Interrupt (ELSI)
1
Transmitter Holding Register Empty Interrupt (ETBEI)
0
Received Data Available Interrupt (ERBFI)
Enabled with DLAB=0.
IIR
Address :
0xB400
1052
Access :
8bit
Read
Bit No.
Description
7-6 FIFO
Enabled
5-4 0
3 Interrupt
ID
Bit2
2 Interrupt
ID
Bit1
1 Interrupt
ID
Bit0
0 0:
Interrupt
Pending
Description of Interrupt ID.
