- 2-14 -
2) PORT DESCRIPTION
Pin
Name In Micom
Name In Model
Enable I/O
I/O
Output Format
Description
1
P60/A16
PCD_PWR
I/O
O
CMOS
DSP power suppler ON output
2
P61/A17
PT_PWR
I/O
O
CMOS
Tuner power supplier ON output
3
A63/A18
PPWR
I/O
O
CMOS
System suppleir ON output
4
P63/A19
PTEL_MUTE
I/O
I
-
Telephone mute input
5
P64//RD
PLIGHT
I/O
O
CMOS
Front light output
6
P65//WR
PREMOTE
I/O
O
CMOS
Exteranl power amplifier enable output
7
P66//WAIT
PDIM_IN
I/O
I
-
Dimmer input
8
P67/ASTB
PSTANBY
I/O
O
CMOS
Clock for interface with volume controller
9
VDD
VDD
-
-
-
Positive power spply
10
p100/TI5/TO5
PEV_CLK
I/O
O
CMOS
Clock for interface with volum controller
11
P101/TI6/TO6
PEV_CLK
I/O
O
CMOS
To volume controller, data output
12
P102/TI7/TO7
N.C.
I/O
I
CMOS
Not to be used (Open)
13
P103/TI8/TO8
PCDC_PWR
I/O
O
CMOS
CD changer power supplier ON output
14
P30/TO0
PCD_REV
I/O
O
CMOS
In MD, load motor "revers" command
output
15
P31/TO1
PLMT_ISW
I/O
I
-
In MD, limit switch state input
16
P32/TO2
PCD_SW1
I/O
I
-
In MD, SW1 state input
17
P33/TI1
PCD_SW2
I/O
I
-
In MD, SW2 state input
18
P34/TI2
PCD_SW4
I/O
O
CMOS
In MD, switching load and sled motor
19
P35/TI00
PCD_FWD
I/O
O
CMOS
In MD, load motor "forward" command output
20
P36/TI01
N.C.
I/O
I
CMOS
Not to be used (Open)
21
P37/EXA
N.C.
I/O
I
CMOS
Not to be used (Open)
22
TEST/VPP
TEST
-
-
-
pull down (470
Ω
~10k
Ω
)
23
P90
N.C.
I/O
I
N-CH
Not to be used (Open)
24
P91
PPWR_MUTE
I/O
O
N-CH
To power amp, "MUTE" command output
25
P92
N.C.
I/O
I
N-CH
To CD changer, data output
26
P93
PAF_MUTE
I/O
O
N-CH
To tuner pack, AF mute output
27
P94
PCDC_DO
I/O
O
N-Ch
To CD changer, data output
28
P95
N.C.
I/O
O
CMOS
Not to be used (Open)
29
P120/RTP0
RDRV_OPS
I/O
O
CMOS
In MD, motor driver's power save command
output
30
P121/RTP1
PDRV_OMUTE
I/O
O
CMOS
DSP reset output
31
P122/RTP2
N.C.
I/O
I
CMOS
Not to be used (Open)
32
P123/RTP3
PDSP_IDRF
I/O
I
-
Focusing OK signal input
33
P124/RTP4
PDSP_ORST
I/O
O
CMOS
DSP reset output
34
P125/RTP5
PCD_OCEN
I/O
O
CMOS
DSP chip enale output
35
P126/RTP6
N.C.
I/O
I
CMOS
Not to be used(Open)
36
P127/RTP7
N.C.
I/O
I
CMOS
Not to used(Open)
37
VDD
VDD
-
-
-
Positive power supply (+5V)
38
X2
X2
-
-
-
X’tal 9.8304 MHz
39
X1
X1
I
-
-
X’tal 9.8304 MHz
40
VSS
GND
-
-
-
Ground
41
XT2
XT2
-
-
-
Sub clock 32.768kHz
42
XT1
XT1
I
-
-
Sub clock 32.768kHz
43
/RESET
RESET
I
-
-
System reset input
44
P00/INTP0
PRDS_CLK
I/O
I
-
From tuner pack, RDS clock input
45
P01/INTP1
PCD_IWRQ
I/O
I
-
Sub-Q read standard level singla input
46
P02/INTP2/NMI
PCDC_DI
I/O
I
-
From CD changer, data input
47
P03/INTP3
PACC
I/O
I
-
From ISO jack, ACC signal input(interrupt3)
48
P04/INTP4
N.C.
I/O
I
-
Not to be used(Open)
49
P05/INTP5
PLINE_MUTE
I/O
O
CMOS
LINE MUTE ON/OFF
50
P06/INTP6
N.C.
I/O
I
CMOS
Not to be used(Open)
51
AVDD
AVDD
-
-
-
Positive power supply to A/D converter
52
AVREF0
AVREF0
-
-
-
Reference voltage applied to A/D converter
53
P10/ANI0
N.C.
I
I
-
Not to be used(Open)
54
P11/ANI1
PS_MTR
I
I
-
Radio station’s strength singal input
55
P12/ANI2
PLVL_MTR
I
I
-
Sound level’s signal input
56
P13/ANI3
PKEY1
I
I
-
Key #1 line input
57
P14/ANI14
PKEY2
I
I
-
Key #2 line input
58
P15/ANI15
PVOLA
I
I
-
Encoder volume terminal #A input
59
P16/AVI16
PVOLB
I
I
-
Encoder volume terminal #B input
60
P17/ANI17
N.C.
I
I
-
Not to be used(open)
61
AVSS
AVSS
-
-
-
Ground for A/D converter and D/A converter
62
P130/ANO0
N.C.
I/O
I
CMOS
Not to be used(open)
63
P131/ANO1
N.C.
I/O
I
CMOS
Not to be used(open)
64
AVREF1
AVREFI
-
-
-
Reference voltage applied to D/A converter
65
P70/RxD2/SI2
N.C.
I/O
I
CMOS
Not to be used(open)
66
P71/TxD2/SO2
PFRT_DO
I/O
O
CMOS
To LCD driver, data output
67
P72/ASCK2/SCK2 PFRT_CLK
I/O
O
CMOS
Clock output for interface with LCD driver
68
P20/RxD1/SI1
PPLL_DI
I/O
I
-
From PLL IC, data input
Summary of Contents for LAC-M5530EK
Page 8: ... 2 3 3 CD PART ...
Page 9: ... 2 4 READING DISPLAY CHECK ONLY CD DISPLAY ...
Page 10: ... 2 5 READING OK CHECK NO DISC DISPLAY ...
Page 11: ... 2 6 READING OK CHECK A NO DISC DISPLAY ...
Page 12: ... 2 7 READING OK CHECK B NO DISC DISPLAY ...
Page 13: ... 2 8 READING OK CHECK C NO DISC DISPLAY ...
Page 14: ... 2 9 READING OK CHECK D NO DISC DISPLAY ...
Page 15: ... 2 10 READING OK CHECK E NO DISC DISPLAY ...
Page 18: ... 2 13 IC401 PD784214A 1 PORT ASSIGNMENT INTERNAL BLOCK DIAGRAM of ICs ...
Page 21: ... 2 16 IC501 MN6627933CG ...
Page 22: ... 2 17 1 BLOCK DIAGRAM ...
Page 27: ... 2 22 IC505 AMC1117 1 BLOCK DIAGRAM ...
Page 28: ... 2 23 IC601TDA7348D ...
Page 29: ... 2 24 IC801 TB2903HQ ...
Page 30: ... 2 25 IC901 PT6524 1 BLOCK DIAGRAM 2 PIN CONFIGURATION ...
Page 31: ... 2 26 ...
Page 32: ...2 27 2 28 BLOCK DIAGRAM ...
Page 33: ...2 29 2 30 SCHEMATIC DIAGRAM 1 MAIN SCHEMATIC DIAGRAM ...
Page 34: ...2 31 2 32 2 FRONT SCHEMATIC DIAGRAM ...
Page 35: ...2 33 2 34 3 CDP SCHEMATIC DIAGRAM ...
Page 36: ...2 35 2 36 PRINTED CIRCUIT DIAGRAM 1 MAIN P C BOARD ...
Page 37: ...2 37 2 38 2 FRONT P C BOARD ...
Page 38: ...2 39 2 40 2 FRONT P C BOARD ...
Page 39: ...2 41 2 42 3 CDP P C BOARD TOP 3 CDP P C BOARD BOTTOM ...