Keysight Technologies D9020DDRC, Manual

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14 Clock Timing (CT) Tests
192 DDR2(+LP) Compliance Testing Methods of Implementation
Probing for Clock Timing Tests
When performing the Clock Timing tests, the DDR2(+LP) Compliance Test Application will prompt
you to make the proper connections. The connection for Clock Timing tests may look similar to the
following diagram. Refer to the Connection tab in DDR2 Electrical Performance Compliance Test
application for the exact number of probe connections. Typically, you need minimum three probe
connections to run the tests.
You can use any of the oscilloscope channels as Pin Under Test (PUT) source channel. You can
identify the channels used for each signal in the Configuration tab of the DDR2(+LP) Compliance
Test Application. (The channels shown in
Figure 28 are just examples).
For more information on the probe amplifiers and differential probe heads, see Chapter 20 , “InfiniiMax
Probing,” starting on page 351.
Test Procedure
1 Start the automated test application as described in “Starting the DDR2(+LP) Compliance
Test Application" on page 27.
2 Ensure that the RAM reliability test software is running on the computer system where the DDR2
Device Under Test (DUT) is attached. This software will perform test on all the unused RAM on
the system by producing repetitive burst of read-write data signals to the DDR2 memory.
3 Connect the differential solder-in probe head to the PUTs on the DDR2 devices.
4 Connect the oscilloscope probes to any channels of the oscilloscope.
5 In the DDR2 Test application, click the Set Up tab.
6 Select the Speed Grade options. For Clock Timing Tests, you can select any speed grade within
the selection: DDR2-400, DDR2-533, DDR2-667, DDR2-800, DDR2-1066.
Figure 28 Probing for Clock Timing Tests with Three Probes
Infiniium Oscilloscope
Infiniium Oscilloscope
DDR2 DIMM
InfiniiMax solder-in probes