9
KDC-W3534A/W3534G
KDC-W40AY
Pin No.
Pin Name
I/O
Application
Processing Operation Description
74
RAMSEL2
I
With DRAM/No DRAM switching for different models
H : With DRAM, L : No DRAM
75
RAMSEL
I
With DRAM/No DRAM switching for different models
H : With DRAM, L : No DRAM
76
RZM
I
0bit MUTE detection
H :
≥
1.7V, L : <1.7V
77
LZM
I
0bit MUTE detection
H :
≥
1.7V, L : <1.7V
78
AAC
I
AAC compatibility switching
H : AAC non-compatible, L : AAC compatible
79
ASEL
I
Audio output polarity switching
H : Reverse output, L : Non-reverse output
80
E2P WR
I
E2PROM write switching
H : E2PROM WRITE, L : NORMAL
81
TEST I 0
I
TEST MODE I 0
(Not used)
82
TEST I 1
I
TEST MODE I 1
(Not used)
83
TEST I 2
I
TEST MODE I 2
(Not used)
84
TEST I 3
I
TEST MODE I 3
(Not used)
85,86
NC
-
Not used
Low-fixed
87
MSTOP
I
Standby restart interruption
H : STOP release, L : STOP
88
INTSV
I
Interruption from servo IC
H : Interruption
89~92
NC
-
Not used
Low-fixed
93
D-MUTE
O
Driver MUTE
H : OFF, L : ON
94
SYS SDA
I/O
System
µ
-com I2C data
95
NC
-
Not used
Low-fixed
96
SYS SCL
I/O
System
µ
-com I2C clock
97~99
NC
-
Not used
Low-fixed
100
E2P SDA
I/O
ROM correction E2P I2C data
MICROCOMPUTER’S TERMINAL DESCRIPTION
