DMF-3020/3020
(
S
)
/5020/MD-203
6
CIRCUIT DESCRIPTION
No.
Name
I/O
Description
1,2
-
O
N.C.
3
DARST
O
DAC reset
4
DINSEL
O
Digital 1/2 select
H; DIGITAL 1
5
RD
O
SRAM read strobe
6
WR
O
SRAM write strobe
7
CS
O
SRAM CS
L; SRAM enable
8
ASTB
O
SRAM address strobe
9
Vdd
-
Power supply (Microprocessor)
10
POWER
O
Power terminal
H; Power ON
11
MUTE
O
Mute control output
L; Mute ON
12
INISW2
I
Destination selector
L; DMF-3020/5020
13
SCHNG
O
E2PROM data IN/OUT change-over
H; SDA output
14
SBUSY
I/O
16 serial busy
15
SDATA
I/O
16 serial data
16
SCL
O
E2PROM clock
17
SDA
I/O
E2PROM data
18
LDON
O
Laser ON / OFF control port
H; LD ON
19
RMS
O
Pick RMS
H; ON
20
XLAT
O
System IC latch
21
SENS
I
System IC sens
22
Vpp
-
GND
23
PROTECT
I
Detection port of protect switch
L; Protect ON
24
REFLECT
I
Detection port of reflect switch
H; Low reflect
25
DISCIN
I
Detection of disc input switch
L; Disc out SW ON
26
STTLMT
I
Detection port of limit switch
L; Start limit SW ON
27
PHOTSW
I
Detection of mechanism play position
L; Photo sensor ON
28
REC SW
I
Input port of detection from REC position switch
L; REC SW ON
29
LOADIN
O
Output port of loading motor control signal
L; Loading OUT
30
LOADOUT
O
Output port of loading motor control signal
L; Loading IN
31
MNT0
I
FOK signal from CXD2652AR (IC2)
L; Focus ON
32
MNT2
I
Input port of monitor 2 from CXD2652AR (IC2)
33
XRST
O
Output port of reset signal to CXD2652AR (IC2)
34
TX
O
Output port of recording permitted signal
35
RECP
O
Laser power control to CXD2652AR (IC2)
36
MNT3
I
Input port of monitor 3 from CXD2652AR (IC2)
37
Vdd
-
Power supply (Microprocessor)
38,39
-
-
Clock IN / OUT (12.5MHz)
40
GND
-
GND
41
OPEN
O
No used
42
GND
I
No used
43
RESET
I
Microprocessor hard reset
44
REM
I
Remocon signal input terminal
45
XINT
I
Input port of interrupted status from CXD2652AR (IC2)
46
CE
I
Microprocessor chip enable
H; Enable / L; disable
47
SQSY
I
Input port of sub code Q from CXD2652AR (IC2)
48
DQSY
I
U-bit of digital IN / SUB Q sync input of CD format from CXD2652AR (IC2)
49
DDQSY
I
N.C.
50
MNT1
I
Input port of track jump detection from CXD2652AR (IC2)
51
Vdd
-
Microprocessor power supply (+5V)
52
AVref 0
-
A/D reference voltage (Connect Vdd)
53~56
KR0~KR3
I
Key return (KR0~KR3)
57
TMSW
I
Timer switch input 0.0V
OFF
1.25V
PLAY
3.7V
REC
5.0V
58
INISW1
I
Detection selector
59
BACK
I
Back up voltage detection (Less than 2.2V : NG)
60
PROT
I
Protection detection
61
GND
-
GND
62
BACK ON
O
Back up charge control
H; Charge ON
63
ENCA
I
Rotary encoder A
64
AVref 1
-
D/A reference voltage (+5V)
65
SRDT
I
Data for reading input from CXD2652AR (IC2)
1-2 Pin description
1. Main microprocessor : uPD784215GF532 (X25: IC31)
1-1 Microprocessor peripley block diagram
E2PROM
RF AMP
ML:77
ADRST:83
PROT:60
DINSEL:4
STBLED:76
RECLED:86
DRON:71
MC:79
DARST:3
MD:78
ENCB:70
31:MNT0
50:MNT1
ATRAC
DRAM
(X33) IC7
(X33) IC2
(X33) IC1
(X33) IC6
(X25) IC34
(X25) IC33
36:MNT3
32:MNT2
CXD2652AR
66:SWDT
20:XLAT
67:SCLK
65:SRDT
33:XRST
21:SENS
47:SQSY
48:DASY
45:XINT
35:RECP
34:TX
18:LDON
MAIN
u-COM
19:RMS
CXA2523AR
13:SCHNG
DWDT:74
DCLK:75
17:SDA
16:SCL
LC75710NE
ENCODER
FL DRIVER
(X25) S1
(X25) IC1
FLDCE:72
23:PROTECT
24:REFLECT
25:DISCIN
(MDM-04)
MD MECHA.
ENCA:70
27:PHOTSW
26:STTLMT
POWER:10
28:RECSW
MUTE:11
29:LOADIN
INISW2:12
INISW1:58
30:LOADOUT
TMSW:57
5:RD
KR2:55
KR3:56
7:CS
6:WR
SRAM
8BIT MEMORY
LATCH
AD/DA CONVERTER
KR1:54
KR0:53
~~
84:AD0
91:AD7
– BUS –
DMF3020
MD203
DMF5020
92:A8
PCM1716
PCM3002
98:A14
RESET:43
PCM3003
(AD)
(AD)
(DA)
(DA)
CE:46
BACKCHK:85
BACKV:59
BACKON:62
SDATA:15
SBUSY:14
REM:44
DMF-5020(K)
COVER1,1P(
98.12.9
16:39
y[W
11