D-W320V
CIRCUIT DESCRIPTUON
6
No
Terminal
I/O
Specification
1
A+3.3V
–
+3.3V power supply for analog video
2
CVOUT
O
Composite video output
3, 4
N/C
O
Not used
5.6
VGND
–
Analog video ground
7
R+5V
–
D5V power supply
8, 9
D+3.3V
–
Digital +3.3V power supply
10, 11
DGND
–
Digital ground
12
CD CLK
I
Audio external frequency clock (384 FS)
13
EMPH
O
Audio emphasis output (High Active)
14
DILRCK
O
Audio left right clock
15
HRDY
–
Host data ready
16
DISCK
O
Audio bit clock
17
DIDATA
O
Audio data serial bus
18
HINT
O
Host interrupt
19 N/C
O
Not
used
20
VRST
I
Hardware reset (Low Active)
21
HCK
I
Host clock
22
HDIO
I/O
Host serial data bus
23
CDSCK
I
CD bit clock
24
CDDATA
I
CD data input
25
CDLRCK
I
CD left right clock input
26
IPFLG
I
CD data error flag (C2P0)
27
HSEL
I
Host address / data select
28~30
DATA/SFSY/SBSY
I
Not used
3. Connection terminal (CN P401) specification for MPEG board
4. MPEG board block diagram
R+5V
DGND
R+5V
DGND
R+5V
DGND AGND
2MDRAM
CD I/F
Subcode I/F
Host I/F
D+3.3V A+3.3V
S Video Out
Video Out
Audio Out
4MDRAM
1chip
MPEG
Decoder
LPF
D-W320V
1P(
97.11.28
11:20
PM
y [ W 1
