Keithley System SourceMeter 2601B, Reference Manual

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Section 7: TSP command reference Series 2600B System SourceMeter® Instrument Reference Manual
7-304 2600BS-901-01 Rev. B / May 2013
Also see
Operation Status Register (on page E-9)
status.operation.* (on page 7-270)
status.questionable.*
These attributes manage the status model's questionable status register set.
Type TSP-Link accessible Affected by Where saved Default value
Attribute - - - - - - - -
.condition (R) Yes Not applicable Not saved Not applicable
.enable (RW) Yes Status reset Not saved 0
.event (R) Yes Status reset Not saved 0
.ntr (RW) Yes Status reset Not saved 0
.ptr (RW) Yes Status reset Not saved 13,056 (All bits set)
Usage
questionableRegister = status.questionable.condition
questionableRegister = status.questionable.enable
questionableRegister = status.questionable.event
questionableRegister = status.questionable.ntr
questionableRegister = status.questionable.ptr
status.questionable.enable = questionableRegister
status.questionable.ntr = questionableRegister
status.questionable.ptr = questionableRegister
questionableRegister The status of the questionable status register; a zero (0) indicates no bits set
(also send 0 to clear all bits); other values indicate various bit settings
Details
These attributes are used to read or write to the questionable status registers. Reading a status register returns a
value. In the binary equivalent, the least significant bit is bit B0, and the most significant bit is bit B15. For
example, if a value of 1.04 (which is 12,288) is read as the value of the condition register, the binary
equivalent is 0011 0000 0000 0000. This value indicates that bits B12 and B13 are set.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
** > > > > > > > > > > > > > > *
0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
* Least significant bit
** Most significant bit
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to Status register set contents (on
page E-1) and Enable and transition registers (on page E-19). The individual bits of this register are defined in
the following table.