Keithley System SourceMeter 2601B, Reference Manual

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Section 7: TSP command reference Series 2600B System SourceMeter® Instrument Reference Manual
7-256 2600BS-901-01 Rev. B / May 2013
Also see
Status byte and service request (SRQ) (on page E-15)
status.measurement.*
This attribute contains the measurement event register set.
Type TSP-Link accessible Affected by Where saved Default value
Attribute - - - - - - - -
.condition (R) Yes Not applicable Not saved Not applicable
.enable (RW) Yes Status reset Not saved 0
.event (R) Yes Status reset Not saved 0
.ntr (RW) Yes Status reset Not saved 0
.ptr (RW) Yes Status reset Not saved 10,627 (All bits set)
Usage
measurementRegister = status.measurement.condition
measurementRegister = status.measurement.enable
measurementRegister = status.measurement.event
measurementRegister = status.measurement.ntr
measurementRegister = status.measurement.ptr
status.measurement.enable = measurementRegister
status.measurement.ntr = measurementRegister
status.measurement.ptr = measurementRegister
measurementRegister The status of the measurement event register; a zero (0) indicates no bits
set (also send 0 to clear all bits); other values indicate various bit settings
Details
These attributes read or write the measurement event registers.
Reading a status register returns a value. The binary equivalent of the returned value indicates which register
bits are set. The least significant bit of the binary number is bit B0, and the most significant bit is bit B15.
For example, assume value 257 is returned for the enable register. The binary equivalent is
0000 0001 0000 0001. This value indicates that bit B0 (VLMT) and bit B8 (BAV) are set.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
** > > > > > > > > > > > > > > *
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1
* Least significant bit
** Most significant bit
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
Status register set contents (on
page E-1) and Enable and transition registers (on page E-19). The individual bits of this register are defined in
the following table.