S530 Parametric Test System Test Subroutine Library User's Manual
Section 3: Test subroutine library reference
S530-907-01 Rev. A / September 2015
3-23
deltl1
This subroutine estimates MOSFET gate length reduction (
L) using transconductance (g
m
) data obtained from
the
vtext2
subroutine for two different transistors.
Usage
double deltl1(int
d1
, int
g1
, int
s1
, int
sub1
, double
l1
, int
d2
, int
g2
, int
s2
,
int
sub2
, double
l2
, double
vlow
, double
vhigh
, double
vds
, double
vbs
, double
ithr
, double
vstep
, int
npts
, int
*kflag
)
d1
Input
The drain pin of Q1
g1
Input
The gate pin of Q1
s1
Input
The source pin of Q1
sub1
Input
The substrate pin of Q1
l1
Input
Drawn gate length of Q1, in microns
d2
Input
The drain pin of Q2
g2
Input
The gate pin of Q2
s2
Input
The source pin of Q2
sub2
Input
The substrate pin of Q2
l2
Input
Drawn gate length of Q2, in microns
vlow
Input
Start of the gate-source voltage (V
GS
) search, in volts
vhigh
Input
End of the V
GS
search, in volts
vds
Input
Drain bias, in volts
vbs
Input
Substrate bias, in volts
ithr
Input
Drain-source trigger current (I
DS
), in amperes
vstep
Input
V
GS
step size, in volts
npts
Input
Number of points in the V
GS
sweep
kflag
Output
Returned status flag:
0 = Normal completion
1 = First g
m
measurement failed
2 = Second g
m
measurement failed
Returns
Output
Estimated gate length reduction
Details
The
npts
parameter must be greater than 5. If a value less than 5 is used, the subroutine uses 5
points by default.
The equation used for this calculation is:
L = ((Slope
1
/ Slope
2
)
(L
1
- L
2
) / (Slope
1
/Slope
2
- 1.0)
Use this subroutine to infer the variability in the channel length based on the transconductance
comparison of two devices, where the reference device is considerably larger than the second device.
