2-16
Functional Description
Data Transfer
Because DAS-800 Series boards do not support DMA (Direct Memory
Access), data is always transferred from a DAS-800 Series board to the
host computer’s memory through an output port. Data can be transferred
as either a foreground process or a background process. If data is
transferred in the background, the end-of-conversion interrupt must be
enabled so that the board can notify the host computer when new data is
available; refer to page 2-25 for more information about interrupts. If data
is transferred in the foreground, interrupts are not required.
DAS-800 Series boards contain a four-word, first-in, first-out memory
location (FIFO). When you initiate conversions under hardware control,
using an internal or external clock source, the result of each conversion is
automatically stored in the FIFO.
Note:
When you use software to initiate conversions, the FIFO control
logic is automatically disabled and the FIFO is emptied.
The FIFO increases the maximum attainable conversion frequency by
increasing the maximum software interrupt latency allowed by a factor of
four (up to the maximum conversion frequency of 40 kHz).
If the conversion frequency is too fast or if the time required to service the
interrupt is too long, the hardware may perform more than four
conversions before the converted data is read. The hardware can detect
this condition and generate an error to indicate that unread data in the
FIFO was overwritten and samples were lost.
Note:
When using DriverLINX, the operation of the FIFO is transparent.
The DriverLINX software performs the data transfer.
