Keithley 7077, Instruction Manual

Page: 50 / 62

Service Information
4-12
4.5 Principles of operation
The following paragraphs discuss the basic operating princi-
ples for the Model 7077 and can be used when troubleshoot-
ing the matrix card. The schematic drawing of the matrix
card is shown in drawing 7077-106, located at the end of
Section 5.
Table 4-3
Differential and common mode isolation test
Test no.
Differential or
common mode test Crosspoints
closed
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
30
31
32 ROW A
COLUMN 1
COLUMN 2
COLUMN 3
COLUMN 4
COLUMN 5
COLUMN 6
COLUMN 7
COLUMN 8
COLUMN 9
COLUMN 10
COLUMN 11
COLUMN 12
ROW B
ROW C
ROW D
ROW E
ROW F
ROW G
ROW H None
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A1 and B1
A1 and C1
A1 and D1
A1 and E1
A1 and F1
A1 and G1
A1 and H1
CARDSEL
CLRADDR
NEXTADDR
CLK
IDDATA
D7 D6 D5 D4 D3 D2 D1 D0
Figure 4-8
ID data timing diagram
4.5.1 Card identification
Identification coding and a matrix configuration table are
stored in erasable programmable read only memory
(EPROM). This information is sent to the Model 707/708 so
the switching matrix can determine which type of matrix
card is installed in a particular slot. This lets the Model 707/
708 send valid configuration data to the matrix card.
On power up, control line CARDSEL goes low turning on
the EPROM (U128). This control line and other control lines
from the Model 707/708 are buffered by U130. Lines CLK,
NEXT ADDR, and CLR ADDR along with counter U126
control the task of loading data from the EPROM into the
parallel to serial shift register (U127). Data sent from U130
to the Model 707/708 through the IDDATA line is strobed by
the CLK control line. The timing diagram in Figure 4-8
shows the first byte of identification data during the transfer
sequence. For subsequent bytes, the CLRADDR line stays
low.
4.5.2 Switching circuitry
Matrix configuration data is sent from the Model 707/708
through the RELAY DATA control line and is serially loaded
into the 12 shift registers (U114 through U125). The matrix
card relays configure when the registers receive the
STROBE signal from the Model 707/708. A relay is ener-
gized when a relay driver output (U100 through U113) is low
(connected to digital common). A driver output is low when
a “high” data bit is clocked (i.e., inverting drivers).