Keithley 7013-S, Instruction Manual

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Service Information
5-12
5.4 Special handling of static-sensitive
devices
CMOS and other high-impedance devices are subject
to possible static discharge damage because of the
high-impedance levels involved. The following pre-
cautions pertain specifically to static-sensitive devices.
However, since many devices in the Model 7013 are
static-sensitive, it is recommended that they all be
treated as static-sensitive.
1. Such devices should be transported and handled
only in containers specially designed to prevent or
dissipate static build-up. Typically, these devices
will be received in anti-static containers made of
plastic or foam. Keep these parts in their original
containers until ready for installation.
2. Remove the devices from their protective contain-
ers only at a properly grounded work station. Also,
ground yourself with a suitable wrist strap while
working with these devices.
3. Handle the devices only by the body; do not touch
the pins.
4. Any printed circuit board into which the device is
to be inserted must first be grounded to the bench
or table.
5. Use only anti-static type de-soldering tools and
grounded-tip soldering irons.
5.5 Principles of operation
The paragraphs below discuss the basic operating
principles for the Model 7013 and can be used as an aid
in troubleshooting the switch card. The schematic
drawing of the switch card is shown on drawing num-
ber 7013-106, located at the end of Section 6.
5.5.1 Block diagram
Figure 5-7 shows a simplified block diagram of the
Model 7013. Key elements include the relay drivers
and relays, as well as the ROM, which contains card ID
and configuration information. These various elements
are discussed in the following paragraphs.
5.5.2 ID data circuits
Upon power-up, card identification information from
each card is read by the mainframe. This ID data
includes such information as card ID, hardware set-
tling time, and relay configuration information.
ID data is contained within an on-card EEPROM
(U105). In order to read this information, the sequence
described below is performed on power-up.
1. The IDDATA line (pin 6 of U105) is set from high to
low while the IDCLK line (pin 5 of U105) is held
high. This action initiates a start command to the
ROM to transmit data serially to the mainframe
(Figure 5-8).
2. The mainframe sends the ROM address location to
be read over the IDDATA line. The ROM then
transmits an acknowledge signal back to the main-
frame, and it then transmits data at that location
back to the mainframe (Figure 5-9).
3. The mainframe then transmits an acknowledge
signal, indicating that it requires more data. The
ROM will then sequentially transmit data after
each acknowledge signal it receives.
4. Once all data is received, the mainframe sends a
stop command, which is a low-to-high transition
of the IDDATA line with the IDCLK line held high
(see Figure 5-9).
5.5.3 Relay control
Card relays are controlled by serial data transmitted
via the relay DATA line. A total of five bytes for each
card are shifted in serial fashion into latches located in
the card relay driver ICs. The serial data is clocked in
by the CLK line. As data overflows one register, it is fed
out the Q’s line of the register down the chain.
Once all five bytes have shifted into the card, the
STROBE line is set high to latch the relay information
into the Q outputs of the relay drivers, and the appro-
priate relays are energized (assuming the driver out-
puts are enabled, as discussed below). Note that a relay
driver output goes low to energize the corresponding
relay.