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5-40
5.10.2
*ESE
event status enable
To set the contents of the Standard Event Status Enable Register.
*ESE <NRf>
<NRf> = 0
Clear (reset) register
= 1
Set OPC (B0) of enable register
= 4
Set QYE (B2) of enable register
= 8
Set DDE (B3) of enable register
= 16
Set EXE (B4) of enable register
= 32
Set CME (B5) of enable register
= 64
Set URQ (B6) of enable register
= 128
Set PON (B7) of enable register
Power-up
Clears register
*CLS
No effect
*RST
No effect
:STATus:PRESet
No effect
DCL, SDC
No effect
The *ESE command is used to set the contents of the Standard Event Status Enable Register.
This command is sent with the decimal equivalent of the binary value that determines the de-
sired state (0 or 1) of the bits in the register.
This register is used as a mask for the Standard Event Status Register. When a standard event is
masked, the occurrence of that event will not set the Event Summary Bit (ESB) in the Status
Byte Register. Conversely, when a standard event is unmasked (enabled), the occurrence of that
event will set the ESB bit. For information on the Standard Event Status Register and descrip-
tions of the standard event bits, see paragraph 5.10.4. The Status Byte Register is described in
paragraph 5.6.8.
A cleared bit (bit set to “0”) in the enable register will prevent (mask) the ESB bit in the Status
Byte Register from setting when the corresponding standard event occurs. A set bit (bit set to
“1”) in the enable register will allow (enable) the ESB bit to set when the corresponding standard
event occurs. For details on the status register structure, refer to paragraph 5.6.
The Standard Event Status Enable Register is shown in Figure 5-13. Notice that the decimal
weight of each bit is included in the illustration. The sum of the decimal weights of the bits that
you wish to be set is the value that is sent with the *ESE command. For example, to set the CME
and QYE bits of the Standard Event Status Enable Register, send the following command:
*ESE 36
Purpose
Format
Parameters
Defaults
Description
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