GPIO expansion bracket for the Komodo and Predator frame grabbers Data
Book
8
4.2
Predator frame grabber general purpose I\O (rev 3 and higher only)
The following table gives a brief functionality description of the various available GPIO signals on
the Predator frame grabber, for more details please go to the relevant documentation.
Board
reference
(J18)
Signal Name I/O Standard
Description
1
din[0]
LVDS
Pin 1 of this header is the positive signal and pin 2
in the negative signal of this LVDS. The differential
pair is converted to a single input on the FPGA
2
3
din[1]
LVDS
Pin 3 of this header is the positive signal and pin 4
in the negative signal of this LVDS. The differential
pair is converted to a single input on the FPGA
4
5
rout[0]
LVDS
Pin 5 of this header is the positive signal and pin 6
in the negative signal of this LVDS. The differential
pair is converted to a single output on the FPGA
6
7
rout[1]
LVDS
Pin 7 of this header is the positive signal and pin 8
in the negative signal of this LVDS. The differential
pair is converted to a single output on the FPGA
8
9
io_out[0]
3.3-V LVTTL Optically isolated outputs
10
io_out[1]
3.3-V LVTTL Optically isolated outputs
11
io_out[2]
3.3-V LVTTL Optically isolated outputs
12
io_out[3]
3.3-V LVTTL Optically isolated outputs
13
io_in[0]
3.3-V LVTTL Optically isolated inputs
14
io_in[1]
3.3-V LVTTL Optically isolated inputs
15
io_in[2]
3.3-V LVTTL Optically isolated inputs
16
io_in[3]
3.3-V LVTTL Optically isolated inputs
17
OptoCoupled
GND
-
Ground signal for opto-isolated signals on this
connector
18
GND
-
Reference ground signal - Board GND
19
gpio_vt[0]
TTL
General Purpose IO
20
gpio_vt[1]
TTL
21
gpio_vt[2]
TTL
22
gpio_vt[3]
TTL
23
gpio[0]
3.3-V LVTTL
24
gpio[1]
3.3-V LVTTL
25
gpio[2]
3.3-V LVTTL
26
gpio[3]
3.3-V LVTTL
Table 3 : GPIO pin assignments, signal name and functions for Predator J18
System Description
