XV-N50BK,XV-N55SL
(No.A0041)1-41
91
VDDio
-
Power supply terminal 3.3V
92
SSPOUT0
I/O SSP0 Data out or UART0 data-terminal-ready signal
93
TXD0
I/O UART0 Serial data output to an external serial device
94
RXD0
I
UART0 Serial data input from external serial device
95
CTS0
I/O UART0 Clear-to-send signal
96
RTS0
I/O UART0 Request-to-send signal
97
VSSio
-
Connect to ground
98
CXI
I
Crystal input terminal for on-chip oscillator or system input clock
99
CXO
O
Crystal output terminal for on-chip oscillator
100
OSCVSS
-
Connect to ground for oscillator
101
OSCVDD
-
Power supply terminal for oscillator 1.8V
102
MVCKVDD
-
Power supply terminal for main and video clock PLL 3.3V
103
SCEN
I
Scan chain test enable
104
MVCKVSS
-
Connect to ground for main and video clock PLL
105
ACLKVSS
-
Connect to ground for audio clock PLL
106
SCMD
I
Scan chain test mode
107
ACLKVDD
-
Power supply terminal for audio clock PLL 3.3V
108
VDDDAK
-
Power supply terminal for DAC digital 1.8V
109
VSSDAC
-
Connect to ground for DAC digital
110
Cr/R
O
Video signal output (Cr output : composite/component Red output)
111
IOM
O
Cascaded DAC differential output used to dump current into external resistor for power
112
C/Cb/B
O
Video signal output (Chrominance output for NTSC/PAL S-Video
113
VAA3
-
Cb output for component Blue output)
114
Y/G
O
Power supply terminal for DAC analog 3.3V
115
VSSA
-
Video signal output (Luminance for S-Video and component Green output)
116
VREF
-
Connect to ground for DAC analog
117
VAA
-
Non connect
118
CVBS/C
O
Video signal output (Composite video Chrominance output for S-Video)
119
RSET
O
Current setting resistor of output DACs
120
COMP
O
Compensation capacitor connection
121
VSS
-
Connect to ground
122
VCLK
-
Non connect
123
VSYNC
-
Non connect
124
HSYNC
-
Non connect
125
VDDio
-
Power supply terminal 3.3V
126~131
VI07~02
-
Non connect
132
VSSio
-
Connect to ground
133,134
VI01,00
-
Non connect
135
VDD
-
Power supply terminal 1.8V
136~139
AD31~28
I/O Multiplexed address / data bus terminal
140
VDDio
-
Power supply terminal
141~144
AD27~24
I/O Multiplexed address / data bus terminal
145
PWE3
I/O Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal
146
AD23
I/O Multiplexed address / data bus terminal
147
VSSio
-
Connect to ground
148~153
AD22~17
I/O Multiplexed address / data bus terminal
154
VDDio
-
Power supply terminal 3.3V
155
AD16
I/O Multiplexed address / data bus terminal
156
PWE2
I/O Byte write enable for FLASH,EEPROM,SRAM or peripherals terminal
157,158
AD15,14
I/O Multiplexed address / data bus terminal
159
VDD
-
Power supply terminal 1.8V
160
SCLK
O
External bus clock used for programmable host peripherals
Pin No.
Symbol
Description
Summary of Contents for XV-N50BK
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