1-62
KW-XC828
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
A15
CS2
WE
A13
A8
A9
A11
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
1. Pin layout
W24L010AJ-12-X (IC653) : SRAM
DECODER
CORE
ARRAY
CONTROL
DATA I/O
V
DD
Vss
CS2
CS1
OE
WE
A0
A16
I/O1
I/O8
2. Block diaglam
3. Pin function
Symbol
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
Function
No Connection
Address Input
Address Input
Address Input
Address Input
Address Input
Address Input
Address Input
Address Input
Address Input
Address Input
Address Input
Data Input/Output
Data Input/Output
Data Input/Output
Ground
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin No.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
I/O4
I/O5
I/O6
I/O7
I/O8
CS1
A10
OE
A11
A9
A8
A13
WE
CS2
A15
V
DD
Function
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
Chip Select Inputs
Address Input
Output Enable Input
Address Input
Address Input
Address Input
Address Input
Write Enable Input
Chip Select Inputs
Address Input
Power Supply
A
-
+
B
-
+
8
7
6
5
1
2
3
4
1
2
3
4
5
6
7
8
AOUTPUT
A-INPUT
A+INPUT
V
B+INPUT
B-INPUT
B OUTPUT
V
NJM4565V-X (IC572) : Dual ope amp
1.Terminal layout & Pin function