KD-S785
1-26
3.Pin function(2/2)
Pin No. Symbol
Function
51
52
53
54
55
56
57
58
59
60
61
62
63
64
io4
VDD
io5
io6
io7
VSSP
Pdo
Vcoi
VDDP
Cko
VDDX
Xi
Xo
VSSX
External SRAM data input/output 4 terminal
Digital power supply (2.5V) terminal
External SRAM data input/output 5 terminal
External SRAM data input/output 6 terminal
External SRAM data input/output 7 terminal
VCO GND
PLL phase error detection signal output terminal
VCO control voltage input terminal
VCO power supply
16.934 MHz clock output terminal
Power supply (2.5V) terminal for oscillator
Connection terminal for oscillator(input)
Connection terminal for oscillator(output)
GND for oscillator
I/O
I/O
-
I/O
I/O
I/O
-
O
I
-
O
-
I
O
-
TC94A02F-005
3. Block diagram
1. Pin layout
2. Pin function
K6R1008V1D (IC512, IC513, IC514) : CMOS SRAM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A0
A1
A2
A3
CS
I/O1
I/O2
Vcc
Vss
I/O3
I/O4
WE
A4
A5
A6
A7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16
A15
A14
A13
OE
I/O8
I/O7
Vss
Vcc
I/O6
I/O5
A12
A11
A10
A9
A8
Clk Gen.
Pre-Charge Circuit
Memory Array
512 Rows
256x8 Columns
I/O Circuit
Column Select
Data
Cont.
CLK
Gen.
A0
A1
A2
A3
A4
A5
A6
A7
A8
CS
WE
OE
I/O1~I/O8
A9 A10 A11 A12 A13 A14 A15 16
Row Select
Symbol
A0-A16
WE
CS
OE
I/O1~I/O8
Vcc
Vss
N.C
Function
Address Input
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power (+3.3V)
Ground
No Connection