JVC HR-XV31EK, Service Manual

Page: 82 / 86

2-47 2-48
AMP
LPF&
AMP
LPF&
IC901
WF3
WF2
WF1
WF4
R L
CN2001 CN2002
6 5
Q2051
Q2052-Q2055
T2051
TRANS
OSC
PO
WER
SW
3
0
2 1
A.
ERASE
REC/PB F.
ERASE
6 7
A/C
HEAD
2
1
FULL
ERASE
HEAD
1
2
IC2201
IC6701
61
NORMAL_OUT
62
NORMAL_IN
MONO_IN
2
43
27
26
DEC_OUT(L) DEC_OUT(R)
FMA_CH1
A
UDIO
HEAD
U
.DR
UM
CN1
9
10 11 12
9
10 11 12
FMA_CH2
J7191
6 5 7 4 3
10
EXT2_IN(R)
15 64 53 57 51 52
4 2
63
EXT2_IN(L) EXT3_IN(L) EXT3_IN(R) BS_IN(R) BS_IN(L) EXT4_IN(L) EXT4_IN(R) LINE_OUT(R) LINE_OUT(L)
22
CH1
21
COM
24
CH2
36
fsc_IN
MUTE_CTL
43 45
DA
TA
42
CLK
30
PB_FM_IN
D
A
CM_L
D
A
CM_R
TP2253
A.PB
.FM
MAIN
( VIDEO/N.
A
UDIO
,
FMA, TERMINAL, TUNER
)
FR
ONT
F_A
UDIO
IN
( R
)
F_A
UDIO
IN
( L
)
PRE_OUT
29
7 8 9 3 4
4 3
WF5
WF6
WF7
EQ
P R
PRE
AMP
REC
ON
REC
VCA
DET
FIL
TER
FIL
TER
+
-
A.MUTE
SP
ON
62
43
1
7
9
53
EP
( LP
)
ON
94 95 96 97 98
( VIDEO/N.A
UDIO
SIGNAL
PR
OCESSOR
)
IC1
+
NO
T
USED
NO
T
USED
69
71
X1
L
R L
R
J7007 LINE_OUT
2 1 4
A
UDIO
( L
)
A
UDIO
( R
)
1 3
4
A.OUT(L) A.OUT(R)
A.GND A.IN(L)
2
3 1
J901
(AV1 IN/OUT)
TU6001
ANT IN
ANT OUT
AUDIO OUT
SIF OUT
46
6
A.IN(R)
Q2255
R
L
SYSCON
A.MUTE(H) N.REC(H)
TO
N.REC_ST(H) I2C_CLK_A
V
I2C_D
A
TA_A
V
H.REC_ST(H) P
AL_PB(H)
(Q2201- Q2204)
MUTE
CONTR
OL
SW
J902
(AV2 IN/DECODER)
4
A.OUT(L) A.OUT(R)
A.GND A.IN(L)
2
3 1
6
A.IN(R)
47
5
1
CN7101
2 7 1 3
CN914
10 11
CN7301
A
OUTL+
A
OUTL-
D
VD FLASH
RO
M
TO
6
0
TERMINAL(I/O)
4 8
EXT1_IN(L) EXT1_IN(R) TV_IN(L) TV_IN(R)
13
8
9
14
7 9
5 3
IC8001
7 1
AMP
AMP
2 6
A
OUTR+
A
OUTR-
DEC_OUT(L) DEC_OUT(R)
A_IN1(L)
A_IN1(R)
5 1 2 7
10 11
4 8
A_IN2(L)
A_IN2(R)
FMA_OUT(R) FMA_OUT(L)
CN7104
CN7191
9
11
3 1
6
3
SW/J
A
CK
43 46 42 45
48 49
R L
L
R
L
R
L R
L R
IC2201-9
PB/REC 30mVp-p
10mV/1msec/DIV
REC/PB 0.34Vp-p
0.1V/1msec/DIV
WF1
IC2201-53
WF2
IC2201-21
REC 1.12Vp-p
0.5mV/20msec/DIV
WF3
TP2253
A.PB
.FM
PB 0.5Vp-p
0.5mV/20µsec/DIV
WF4
IC1-6
REC/PB 0.15Vp-p
50mV/1ms/DIV
WF5
IC1-2
REC/PB 13mVp-p
5mV/1ms/DIV
WF6
IC1-98
REC 0.2Vp-p
50mV/0.5ms/DIV
WF7
AUDIO BLOCK DIAGRAM
+5V
( 32kHz
)
CTL(+) CTL(-)
MAIN
( SYSCON, VPS/PDC
SLICER
)
REC_SAFETY
CTL_AMP_OUT
TO
D.
F
F
CN2001
2
1
LSD
V
.
PULSE
V
.
PULSE
VIDEO/N.
A
UDIO
VIDEO_ENV EE(L)
VIDEO_ENV
EE ( L)
X3001
C3025 TIMER CLOCK
TIMER CLOCK
SW
SAFETY
REC
S3001
SD
A
SCL
5 6
( SYSTEM
CONTR
OL
MICR
O
PR
OCESSOR
)
IC3001
LSB LSD LSC
TP4001
CTL.
P
3
0
M
LSB LSA LSC
ENCODER RO
TA
R
Y
1 2
CN1
( +
)
HEAD
CTL
( -
)
HEAD
CTL
CTL
HEAD
A/C
HEAD
A/C
100 110
D.
F
F
6 3 1
65 64
X1 X2
X3002 MAIN SYSTEM CLOCK (10MHz)
69 67
OSC2(OUT)
OSC1(IN)
I2C_D
A
TA_A
V
I2C_CLK_A
V
I2C_D
A
TA_A
V
I2C_CLK_A
V
IC3003
( SERIAL
MEMOR
Y
)
74 90
A.MUTE
( H
)
N.REC
ST
( H
)
N.REC
( H
)
N.REC
( H
)
I2C_CLK N.REC_ST(H) A.MUTE
( H
)
A.MUTE
( H
)
I2C_CLK_A
V
I2C_D
A
TA_A
V
TO VIDEO/N.
A
UDIO
WF6
WF5
WF7
TO FMA TO TUNER
CFG CAP_M_F/R CAP_PWM LM_F/R/S DFG DR
UM_PWM
8
28
101
35
108 102
58
S
.CASS(H)
S.
C
A
S
S
S
W
S3002
57 49 50 105 76 75
I2C_D
A
TA2
I2C_CLK2
SYNC_DET(H)
72
OSD_CS
51
S
.CLK
53
H.REC_ST
( H
)
H.REC_ST(H)
88
P
AL_PB
( H
)
P
AL_PB(H)
79
WF3
WF4
13
107
S_DET
S_DET
11
26 27
LSA
25 36
JS3001
3
4 2
5
5 6
1
4
9
10
11
12
12
2
1
12 10
4
11
9 1
DR
UM
MO
T
OR
58
57
3i
n1M
D
A
CAP
MO
T
OR
55
LO
ADING
MO
TOR
M M
D PG+
D PG-
L1
L2
CAP
.M
FG
CAP
.M
F/R
CAP
.M
VCTL
LM
F/R/S
DR
UM
PG/FG
DR
UM
VCTL
CN3001
WF1
WF2
SUPPL
Y
SENSOR
TAKE UP SENSOR
PC3001
PC3002
54 55
SP
FG
TU
FG
TO TERMINAL
I2C_D
A
TA
I2C_CLK I2C_D
A
TA
S
.D
A
TA_FRSYS
52
IC201
( ON SCREEN )
10
11
8
CV_IN
CS
SD
A
TA
SYNC_DET
CV
OUT
21
19
V_T
O_OSD
V_FR
OM_OSD
TO VIDEO/N.A
UDIO
SCLK
9
SYNC_IN
24
I2C_D
A
TA
LN21
5
27
C
.SYNC
98
C
.SYNC
CN3001-1
CAP
.M_FG
CN3001-11
DR
UM_PG/FG
TP4001
CTL.P
IC3001-1
IC3001-98
IC3001-17
REC/PB 4.6Vp-p
1.0V/0.5msec/DIV
REC/PB 4.6Vp-p
1.0V/0.2msec/DIV
PB 3.8Vp-p
1.0V/5msec/DIV
REC 3.6Vp-p
1.0V/10msec/DIV
REC/PB4.8Vp-p
1.0V/20µsec/DIV
REC/PB 2.1Vp-p 1.0V/20µsec/DIV
WF2
WF1
WF3
WF4
WF5
WF6
IC3001-19
REC/PB 2.1Vp-p 1.0V/20µsec/DIV
WF7
ST
AR
T_SENSOR
ST
AR
T
SENSOR
Q3002
14
END_SENSOR
END
SENSOR
Q3003
15
BU
F
Q207
SYSTEM CONTROL BLOCK DIAGRAM
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