(No.YF183) 2-9
2-10(No.YF183)
yf183_y20429001a_rev0.1
C2224
0.1
C2205
OPEN
C2214
1
C2213
1
C2209
1
0.0033
C2609
C2606
0.0047
C2624
10p
C2612
1
C2235
OPEN
C2611
1
C2613
1
C2405
0.1
C2218
OPEN
C2603
0.022
C2204
1
C2605
0.0047
C2655
0.047
C2229
OPEN
C2203
1
C2602
OPEN
C2656
0.047
C2233
OPEN
C2601
OPEN
C2217
OPEN
C2210
1
C2202
1
C2610
0.0033
C2623
10p
C2604
0.022
T
C2401
10/6.3
C2403
10/6.3
T
C2406
10/6.3
T
C2402
10/6.3
T
T
C2404
10/6.3
D2652
OPEN
IC2201
AK4666VQ
1
2
3
4
5
SVDD
6
7
8
9
10
11
12
13
14
15
16
17
18
19
DVDD
20
21
22
23
24
25
26
27
HVDD
28
29
30
31
AVDD
32
33
34
35
36
37
38
39
40
41
42 MVDD
43
44
45
46
47
48
L2656
L2601
NQR0269-013X
L2657
L2602
NQR0269-013X
L2402
10u
L2603
NQR0269-013X
L2401
10u
Q2401
2SC4617/QR/-X
Q2403
2SC4617/QR/-X
Q2701
UMX18N-W
R2212
R2620
100K
WR2
WR2
OPEN
R2202
OPEN
R2701
820
R2213
OPEN
R2401
4.7k
R2407
10
R2408
OPEN
R2209
22k
R2208
22k
R2207
33k
R2204
220k
R2206
33k
R2703
560k
R2607
2.2k
R2608
2.2k
R2217
10
R2602
2.2k
R2601
2.2k
R2402
4.7k
R2403
18k
R2705
3.3k
R2609
22k
R2610
22k
R2619
6.8k
R2618
6.8k
R2702
820
R2704
560k
REG_3.1V
AIOBCK
AU_LV_CLK
AUDIO_CS
AU_LV_OUT
PD_L
AOBD
INT_L
EXT/L
EXT/R
EM_DET_L
GND
INT_GND
INT_GND
AOMCLK
BUZZER
A_MUTE
GND
L_MUTE
REG_4.9V
AIOLRCK
INT_R
AIBD
AU_SIG/R
EM_DET_L
SPK+
SPK-
AU_SIG/L
D2701
DA221-X
BCLK2
RIN1
SDTI2
LIN1
SDTO1
EXTL
MUTET
HVCM
VCOM
MUTE
Audio
PDN
CSN
DVSS
BCLK1
AVSS
Controller
BEEP1
CCLK
I/F
CDTI
I/F
Register
Control
INTR
EXTR
INTL
HPF
MVSS
MRF
MPWR
SVSS
MCLK1
+
MIC Power Supply
-
+
HPR
-
HPL
LOUT1
ROUT1
/SDTO2
SDTI1
BEEP2
LRCK2
MCLK2
ALC2
DAC
ALC1
LRCK1
EQ
LPF
ADC
MIX
HPR
0
Ω
0
Ω
TO MAIN IF
(CN108)
TO MAIN IF
(CN101)
TO MAIN IF
(CN107)
TO MAIN IF
(CN112)
TO CPU,MAIN IF
(CN112)
TO DSP
TO CPU
TO CPU
TO CPU,MAIN IF(CN112)
TO CPU,MAIN IF(CN101)
TO CPU,MAIN IF(CN101)
TO CPU
MAIN(AUDIO)
1
0
<PULL UP PWB>
MAIN(AUDIO) SCHEMATIC DIAGRAM
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
