5
4
3
2
1
A
B
C
D
2-15
MAIN(VIDEO I/O) SCHEMATIC DIAGRAM
R321
R3339
R3338
C3201
R3209
R3213
R3214
BLKC
RA3201
RA3202
IC3201
L3203
L3204
C3204
C3205
L3201
L3202
C3202
ASPECT
C3203
R3206
R3207
CLK27A
REG_3.1V
GND
REG_1.8V
TBCCTL
DYO3
DYO2
DYO1
DYO0
DCO3
DCO2
DCO1
DCO0
INV
INH
OUT_HS
OUT_VS
OUT_C0
OUT_C1
OUT_C2
OUT_C3
OUT_Y0
OUT_Y1
OUT_Y2
OUT_Y3
VIFD_IN
VIFD_OUT
VIFD_CLK
VENC_CS
CLK27B
S_IN_L
TL3211
TG_RST
VC3
VC2
VC1
VC0
BLKB
OSD_HD
OSD_VD
DOT_CLK
BLKA
S2_DET
R3201
IC3202
C3238
R3208
C3230
C3231
C3207
REG_2.5V
C3206
C3236
C3232
C3229
C3233
C3228
C3227
REG_4.8V
C3234
C3211
C3212
C3214
C3213
C3210
C3208
C3209
C3237
C3235
/6.3
T
CSO0
CSO1
CSO2
CSO3
YSO0
YSO1
YSO2
YSO3
VDD( I/O)
OUTH
OUTV
OUTH2
OUTV2
ZCNT
VDD(CORE)
VSS
VC0
VC1
VC2
VC3
BLK1
BLK2
BLK3
HDOUT
VDOUT
CLKOSD
HDCVF
VDCVF
VSS
VDD(CORE)
SCANI3
SDOUT
CLK
SDIN
SCLK
CS
VSS
RST
VSS(8DA)
VDD(8DA)
COUT
VREF2
CBOUT
COMP2
ABAR2
CROUT
IREF2
VDD(8DA)
VSS(8DA)
NC
NC
NC
NC
VDD(10DA)
VSS(10DA)
VREF1
YSOUT
COMP1
ABAR1
YCOUT
IREF1
CLPY
VYIN
VSS(8AD)
VDD(8AD)
VRM
VRL
VRH
CIN
VDD(8AD)
VSS(8AD)
VSS
JCP8075
NQR0006-001X
/6.3
T
/4
T
NQR0129-002X
NQR0129-002X
VDD(I/O)
CSYNC
SCANMODE
SCANEN
ADDATEST
VCC
IPTEST
VDD(I/O)
HRP1
HRP2
VDD(CORE)
WYSI0
WYSI1
WYSI2
WYSI3
MONI1
MONI2
VDD(CORE)
VSS
WCLK
WCSI0
WCSI1
WCSI2
WCSI3
WINV
WINH
SDR_ONH
VDD(I/O)
VSS
VDD(CORE)
RESVD
RESHD
AMUTE
SCANI1
SCANI2
VSS
VCCQ
CSI0
CSI1
VSSQ
CSI2
CSI3
VCCQ
VDD(I/O)
CSI4
VSS
VDD(CORE)
CSI5
VSSQ
CSI6
CSI7
INH
INV
VDD(CORE)
VSS
VDD(I/O)
VCC
VSS
YSI0
VDD(CORE)
YSI1
VSSQ
YSI2
YSI3
VCCQ
YSI4
YSI5
VSSQ
YSI6
YSI7
VDD(I/O)
VCCQ
150
0
Ω
10
100
100
100
100
10
µ
10
47
1
1
0
Ω
100
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
MAIN(VIDEO I/O)
TO CAM_DSP
TO DVMAIN
TO CPU
TO REG
NOTE : The parts with marked (
) is not used.