5
4
3
2
1
A
B
C
D
5
4
3
2
1
A
B
C
D
2-21
2-22
0
1
MAIN
(TG
)
IC5501
H2
R5504
R5505
R5503
X5501
C5510
D5501
C5515
R5501
C5518
R5506
R5507
R5511
SHP
SHD
CLK18
CLK54
CLK27
R5502
R5509
L5505
L5506
C5511
R5512
R5513
R5514
C5512
C5514
C5519
PBLK
ID
C5517
OBCLP
C5513
C5509
C5508
C5507
C5504
C5501
C5503
L5502
L5503
L5504
CAM_OUT
REG-CCD
REG_15V
C5506
L5501
C5516
CAM_CLK
REG_3.1V
TG_CS
H1
TG_RST
XAVD
XAHD
GND
RG
CCD_-7V
CCD_15V
SUB
V1
V2
V3
V4
Vss2
H2
Vss3
Vdd4
SHP
SHD
XRS
DCC
Vss4
CLK18/MCK
CAM/VTR
Vdd5
RST
Vss6
SUB
VL
VH
V4
V3
V1
VM
V2
TEST
CLK13/CL
JCY0185
CTL
GND
VDD
OUT
NAX0587-001X
/35
1SS355-X
T
/20
T
/10
NQR0129-002X
NQR0129-002X
NQR0129-002X
/4
T
CS/SEN
CLK/SSK
DATA/SSI
Vdd1
VGAT
DSGAT
HCLR
RG
Vdd2
Vss1
H1
Vdd3
Vdd6
CLK27/CLK1716
ID
WEN
OBCLP
XAVD
XAHD
Vss5
CLPDM
PBLK
SSGCTL
CK
T
22
22
22
1
0.1
0
Ω
0.1
0
Ω
0
Ω
47
47
10
µ
10
µ
4.7
1K
1K
1K
10
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
47
10
µ
0.1
ID
OBCLP
XAVD
XAHD
PBLK
ID
OBCLP
XAVD
XAHD
PBLK
TO
CAM_DSP
T
O
CPU
T
O
CCD
NOTE: The
parts
with
marked
( )
is not used.
y30213001a_rev0.1
TG SCHEMATIC DIAGRAM
0
1
MAIN
(USB
)
GND
R8313
REG_4.8V
X8301
L8301
C8301
C8306
C8311
D8
R8314
USBSENS
A10
C8309
R8310
C8308
C8310
IC8301
R8311
C8305
R8305
C8307
R8303
R8302
R8301
D0
D1
D2
D3
D4
D5
D6
D7
D9
D10
D11
D12
D13
D14
D15
A0
EM_CS2
FLSH_OE
FLSH_WE
GIO3
GIO15
GIO6
DSC_RST
R8306
R8307
R8308
R8309
USB_DP
USB_DN
R8312
NAX0522-001X
NQR0129-002X
/6.3
T
EOT
DREQ
DACK
SDWR
SDRD
INT
READY
VCC( 5V)
REGGND
Vreg( 3.3V)
D-
D+
VBUS
GL
WAKEUP
SUSPEND
BUS_CONF0
BUS_CONF1
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
GND
Vref( 5.0)
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
GND
VCC( 3.3V)
AD
A0
RD
WR
ALE
CS
RESET
CLKOUT
GND
XTAL2
XTAL1
ISP1181ADGG-X
10
0.1
0.1
0.1
0R0
0.1
1M
0.1
22
22
10k
10k
10k
10k
0
DSCRST
GIO3
A10
GIO15
D9
GIO6
D15
D14
D13
D12
D11
D10
DSCRST
EM_CS2
D0
A0/10
FLSH_OE
FLSH_WE
D8
D7
D6
D5
D4
D3
D2
D1
A0/10
GIO3
GIO6
GIO15
EM_CS2
FLSH_OE
A0
FLSH_WE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
T
O
DSC
T
O
DSC
NOTE:
The parts with marked
( )
is not used.
y30216001a_rev0
USB SCHEMATIC DIAGRAM