FS-SD550R/FS-SD770R/FS-SD990R
1-26
3.Block Diagram
ANI-
ALIADING
FILTER
5kHz
BANDPASS
(8th ORDER)
RECONSTRUCTION
FILTER
OSCILLATOR
AND
DIVIDER
DUALITY BIT
GENERATOR
CLOCKED
COMPARATOR
COSTAS LOOP
VARIABLE AND
FIXWD DIVIDER
BIPHASE
SYMBOL
DECODER
DIFFERENTIAL
DECODER
REFERENCE
VOLTEGE
CLOCK
REGENERATION
AND SYNC
TEST LOGIC AND OUTPUT
SELECTOR SWITCH
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CL
TS7
XO
XI
VDD
GND
GND
GND
QUAL
DA
VREF
MUX
VDD
GND
CIN
OUT
Pin
No.
Symbol
I/O
QUAL
--
DA
O
VREF
O
MUX
I
VDD
--
GND
--
CIN
I
OUT
O
GND
--
10
GND
--
11
GND
--
12
VDD
--
13
XI
I
14
XO
O
15
TS7
--
16
CL
O
Function
Non connection
RDS data output
Reference voltage output
Multiplex signal input
+5Vsupply voltage for analog
Ground for analog part(0V)
Sub carrier output of reconstruction filter
Ground for digital part(0V)
Ground for digital part(0V)
Ground for digital part(0V)
Ground for digital part(0V)
+5Vsupply voltage for digital part
Oscillator input
Oscillator output
Non connection
RDS clock output
1
2
3
4
5
6
7
8
9
11
10
15
16
12
14
13
9
2
1
3
5
7
8
4
1.Terminal Layout
2.Pin Function
6
BU1923(IC4) : RDS detector
