JVC DR-MV1SUS, Service Manual

Page: 51 / 75

PIN NO. LABEL IN/OUT FUNCTION PIN NO. LABEL IN/OUT FUNCTION
1 CTL[+] IN/OUT CTL(+) SIGNAL
2 SVss - GND
3 CTL[-] IN/OUT CTL(-) SIGNAL
4 CTLBIAS - CTL BIAS VOLTAGE
5 CTLFB IN CTL PULSE FEEDBACK
6 CTLAMPOUT OUT CTL PULSE OUTPUT
7 CTLSMTIN IN CTL PULSE OUTPUT
8 CFG IN CAPSTAN FG PULSE INPUT
9 SVcc - SYSTEM POWER
10 Avcc - SYSTEM POWER
11 NORM/MESEC/S_DET IN SQPB:H/MESECAM:M/NORMAL:L
12 WIDE_DET2/AFC2 IN NOT USED/TUNING CHECK
13 LSA IN MECHANISM MODE DETECT (A)
14 START_SENSOR IN START SENSOR
15 END_SENSOR IN END SENSOR
16 LSB IN MECHANISM MODE DETECT (B)
17 LSC IN MECHANISM MODE DETECT (C)
18 LED/RF_AGC IN DETECT THE MTS MODE
19 WIDE_DET IN S1/S2 DETECT
20 BS_ANT/AFC IN TUNING CHECK
21 VIDEO_ENV IN AUTO TRACKING DTECT/INPUT THE AVERAGE OF PLAYBACK VIDEO SIGNAL
22 A.ENV/ND[L] IN AUDIO PB FM ENV.INPUT/NON HiFi MODE:L
23 Avss - GND
24 CTL_GAIN/TEST OUT CONTROL AMP OUT FREQUENCY RESPONSE SWITCHIN
25 A.MUTE_VDR[H] OUT AUDIO MUTE CONTROL FOR VDR(MUTE:H)
26 P.MUTE_VDR[H] OUT PICTURE MUTE CONTROL FOR VDR(MUTE:H)
27 C.BIAS2/CONV_CTL OUT ADD THE DC BIAS TO COLOR OUTPUT/RF CONVERTER CONTROL
28 CAP.M_F/R OUT CAPSTAN MOTOR REVERSE CONTROL (FWD:L/REV:H)
29 RC_IN IN REMOTE CONTROL DATA INPUT
30 INPUT_SEL1 OUT VIDEO SIGNAL INPUT SELECT
31 GR_ON[L] - NOT USED
32 BS_REC_LINK/COMPU_IN - NOT USED
33 INPUT_SEL5/COMPU_OUT - NOT USED
34 INPUT_SEL2 OUT VIDEO SIGNAL INPUT SELECT
35 LM_F/R/S[LMC1] OUT LOADING MOTOR DRIVE
36 LSD[LMC2] IN MECHANISM MODE DETECT (D)
37 BS_P.CTL[H]/EDS_CS[L] OUT EDS CHIP SELECT
38 SB_GAIN[PWM] OUT VOLTAGE CONTROL SIGNAL FOR VIDEO FREQUENCY RESPONSE
39 STB OUT CLOCK OUTPUT PERMISSION
40 POWER_DET IN DETECTION SIGNAL FOR POWER DOWN OF AC POWER SUPPLY
41 REC_SAFETY IN REC SAFETY SWITCH DETECT (SW ON:L)
42 PROTECT IN DETECTION VOLTAGE FOR SW POWER SUPPLY
43 Vss - GND
44 C_BIAS1/RMO OUT ADD THE DC BIAS TO COLOR OUTPUT
45 Vcc - SYSTEM POWER
46 KBUS_DATA_IN IN SERIAL DATA TRANSFER INPUT FROM DVD CPU
47 KBUS_DATA_OUT OUT SERIAL DATA TRANSFER OUTPUT TO DVD CPU
48 KBUS_CLK OUT SERIAL DATA TRANSFERMER CLOCK FOR DVD CPU
49 12C_DATA_AV OUT SERIAL DATA TRANSFER OUTPUT FOR AV IC
50 12C_CLK_AV IN/OUT SERIAL DATA TRANSFER CLOCK FOR AV IC
51 S.DATA_TO_SYS IN SERIAL DATA TRANSFER OUTPUT FROM THE ON-SCREEN TO THE FDP DRIVER
52 S.DATA_FR_SYS OUT SERIAL DATA TRANSFER OUTPUT FROM THE FDP DRIVER TO THE ON-SCREEN
53 S.CLK OUT SERIAL DATA TRANSFERMER CLOCKFOR ONSCREEN IC
54 SP_FG IN DETECTION SIGNAL FOR SUPPLY REEL ROTATION/TAPE REMAIN
55 TU_FG IN DETECTION SIGNAL TAKE-UP REEL ROTATION/TAPE REMAIN
56 KBUS_REQ(IN) OUT SERIAL DATA TRANSFER REQUEST TO DVD CPU
57 BS_12C_CLK - NOT USED
58 N.REC_ST[H] OUT NORMAL AUDIO SOUND RECORDING START
59 JUST_CLOCK/EDS[H] IN VIDEO SIGNAL FIELD DETECT
60 TU_12C_DATA OUT DATA OUTPUT TO TUNER
61 TU_12C_CLK OUT CLOCK OUTPUT TO TUNER
62 FWE - FLASH WRITE ENABLE
63 NMI - NOT USED
64 X2 - TIMER CLOCK(32kHz)
65 X1 - TIMER CLOCK(32kHz)
66 RES - RESET TERMINAL(RESET ON:L)
67 OSC1[IN] IN MAIN SYSTEM CLOCK(10MHz)
68 Vss - GND
69 OSC2[OUT] IN MAIN SYSTEM CLOCK(10MHz)
70 Vcc - SYSTEM POWER
71 MODE - NOT USED
72 SYNC_DET[H] IN DETECTION OF VIDEO SYNC SIGNAL (DETECTED : H)
73 S.CASS[H] IN DETECTION SIGNAL FOR SVHS CASSETTE(SVHS:H)
74 A.MUTE_VHS[H] OUT AUDIO MUTE CONTROL FOR VHS(MUTE:H)
75 12C_CLK2 OUT SERIAL DATA TRANSFER CLOCK FOR MEMORY IC
76 12C_DATA2 IN/OUT SERIAL DATA TRANSFER OUTPUT FOR MEMORY IC
77 BS_12C_DATA - NOT USED
78 SYNC_DET_VDR[L] IN DETECTION OF VIDEO SYNC SIGNAL FOR VDR (DETECTED : L)
79 EXP_CLK OUT EXPANDER IC DATA TRANFER CLOCK
80 I.MUTE[L] OUT INTERFACE VIDEO SIGNAL MUTING CONTROL OUTPUT
81 TRICK[H] OUT SLOW/STILL/SEARCH MODE : H
82 Vcc - SYSTEM POWER
83 A.MUTE[H] OUT AUDIO MUTE CONTROL (MUTE:H)
84 Vss - GND
85 SP_SHORT[H] OUT MODE SELECT
86 SLOW_PULSE - NOT USED
87 VP_CTL - NOT USED
88 H.REC_ST[H] OUT HiFi AUDIO SOUND RECORDING START
89 LINE2INFO - NOT USED
90 ANT_CTL/CH_SW OUT NOT USED/RF CONVERTER CHANNEL SELECT
91 OSD_CS OUT ONSCREEN IC CHIP SELECT
92 E5_RESET OUT RESET OUTPUT TO IC1401
93 HI_S.FFREW OUT HIGH SPEED FF/REW CONTROL
94 ADC_RST[L] OUT STEREO A/D CONVERTER RESET PULSE
95 EXP1_DATA OUT SERIAL DATA TO EXPAND IC
96 P.SAVE[L] OUT POWER SAVE MODE:H
97 P.CTL[H] OUT POWER ON/OFF CONTRPL (POWER ON:H)
98 C.SYNC IN COMPOSITE SYNC INPUT
99 A.FF OUT AUDIO FF OUTPUT
100 V.FF OUT
101 CAPPWM OUT CAPSTAN MOTOR CONTROL
102 DRUMPWM OUT DRUM MOTOR CONTROL
103 BIT_IN[H] - NOT USED
104 P.MUTE_VDR[L] OUT PICTURE MUTE CONTROL FOR DVD (MUTE ON:L)
105 ET_REC[H] OUT S-VHS ET REC MODE:H
106 P.MUTE_VHS[L] OUT PICTURE MUTE CONTROL FOR VHS (MUTE ON:L)
107 DFG IN DRUM FG PULSE INPUT
108 DFG IN DRUM FG PULSE INPUT
109 Vcc - SYSTEM POWER
110 V.PULSE OUT V.PULSE ADDITION TIMING CONTROL
111 Vss - GND
112 CTLREF - CTL REFERENCE VOLTAGE
ROTATION DETECTION SIGNAL FOR DRUM MOTOR
/TIMING CONTROL SIGNAL FOR REC
CPU PIN FUNCTION
<SYSCON IC3001>
( 32kHz
)
CTL(+) CTL(-)
MAIN
( SYSCON
)
CTL_AMP_OUT
TO
D.FF
CN2001
2
1
LSD
V
.
PULSE
V
.
PULSE
VIDEO/N. AUDIO
VIDEO_ENV
VIDEO_ENV
X3001
C3025 TIMER CLOCK
TIMER CLOCK
( SYSTEM
CONTROL
MICRO
PROCESSOR
)
IC3001
LSB LSD(LMC2) LSC
TP4001
CTL.
P
3
0
M
LSB LSA LSC
ENCODER ROT
AR
Y
1 2
CN1
( +
)
HEAD
CTL
( -
)
HEAD
CTL
CTL
HEAD
A/C
HEAD
A/C
100 11
0
V.
F
F
6 3 1
65 64
X1 X2
X3002
MAIN SYSTEM
CLOCK
(10MHz)
69 67
OSC2(OUT) OSC1(IN)
I2C_DA
T
A_A
V
I2C_CLK_A
V
I2C_DA
T
A_A
V
I2C_CLK_A
V
74
A.MUTE_VHS
( H
)
A.MUTE_VHS
( H
)
A.MUTE
( H
)_VHS(H)
I2C_CLK_A
V
I2C_DA
T
A_A
V
TO VIDEO/N. AUDIO
TO FMA/DEMOD
CFG CAP
.M_F/R
CAPPWM LM_F/R/S(LMC1) DFG DRUMPWM
8
28
101
35
108 102
49 50
H.REC_ST
( H
)
H.REC_ST(H)
88
WF3
WF4
21
S_DET
S_DET
11
16 17
LSA
13 36
JS3001
3
4 2
5
5 6
1
4
9
10
11
12
12
2
1
12 10
4
11
9 1
DRUM
MOT
OR
58
57
3i
n1M
D
A
CAP
MOT
OR
55
LOADING
MOT
OR
M M
D PG +
D PG -
L1
L2
CAP
.M_FG
CAP
.M_F/R
CAP
.M_VCTL
LM_F/R/S
DRUM_PG/FG DRUM_VCTL
CN3001
WF1
WF2
PHOT
O
SENSOR
PHOT
O
SENSOR
PC3001
PC3002
54 55
SP_FG TU_FG
CN3001-1
CAP
.M_FG
CN3001-1
1
DRUM_PG/FG
TP4001
CTL.P
IC3001-1
IC3001-98
REC/PB 4.6Vp-p
0.2V/0.5msec/DIV
REC/PB 4.6Vp-p
0.1V/1.0msec/DIV
PB 3.2Vp-p
1.0V/10msec/DIV
REC 3.7Vp-p
2.0V/10msec/DIV
REC 5.0Vp-p
2.0V/0.1msec/DIV
WF2
WF1
WF3
WF4
WF5
SDA SCL
6 5
IC3003
(
SERIAL
MEMOR
Y
)
I2C_CLK2
TO TUNER
76 75
I2C_DA
T
A2
I2C_CLK2
I2C_DA
T
A2
TU_I2C_CLK TU_I2C_DA
T
A
61 60
TU_I2C_DA
T
A
TU_I2C_CLK
IC3601
(
SERIAL
to P
ARALLEL
)
95
EXP1_DA
T
A
2
DA
T
A1
79
EXP_CLK
3
CLK
A_INPUT_SEL1
4 5
VDR(H)
N.REC(H)
89
COMPU_IN
30
COMPU_OUT
N.REC
( H
)
N.REC_ST
( H
)
N.REC_ST
( H
)
SP_SHOR
T(H)
SP_SHOR
T(H)
58 85
C.SYNC
C.SYNC
98
SB_GAIN(PWM)
SP_GAIN(PWM)
38
6 7
A.IN_SEL1 A.IN_SEL2
A_INPUT_SEL2 VDR(H)
TO AUDIO I/O
9 8
LED5(L)
F
AN_CTL(H)
10 11
LED6(L) LED7(L)
12
LED8
13
LED9
14
LED10
T
O SW
. REG.
CN5301
CN531
1
5
F
AN_CTL(H)
T
O OPE/JACK
CN7201
LED6(VHS) LED(VHS_REC)
CN3104
11 12 10
LED5(VHS_TIMER)
13
BLUE_LED
T
O DISPLA
Y
CN7001
LED9(DVD_TIMER)
CN3102
2 3
BLUE_LED
1
LED10(DVD)
AL5V
REC_SAFETY
SW
SAFETY
REC
S3001
41
WF5
1 2 3
ST
AR
T_SENSOR
ST
AR
T
SENSOR
Q3002
14
END_SENSOR
END
SENSOR
Q3003
15
CTL_GAIN
24
Q4001
SW
Q301
1
SW
J7506 SA
T
CTL
Q7591 Q7592
SW
Q3007
SW
I2C_CLK2 I2C_DA
T
A2
TO VIDEO SW
SYSTEM CONTROL BLOCK DIAGRAM
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