VS-DT9R/VS-DT6R
1-23
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
X1
VSS1
FLAG
BLKCK
/RFDET
EQx2
EQx4
P71/TIO1
FWD
REW
IREFx4
P75/BUZ
/RESET
STAT
/DMUTE
/P.ON
MLD
MDATA
MCLK
P43/AD3
P44/AD4
P45/AD5
/SW2
/SW3
-
-
I
I
I
I
I
-
O
O
O
-
O
I
O
O
O
O
O
-
-
-
I
I
Connect to external crystal oscillator
Ground terminal
Flag signal input
Sub code block clock signal input
RF signal amplitude detecting signal input
Equalizer select signal input
Equalizer select signal input
Not use
Loading (EJECT) output
Loading (LOAD) output
Switching signal for IREF current (4x mode : L)
Not use
Reset signal output (L: reset)
Status signal input
Muting output
Power ON/OFF switching signal output
Microcomputer command load signal output
Microcomputer command data output
Microcomputer command clock signal output
Not use
Not use
Not use
Mechanism switch (Loading switch)
Mechanism switch (Chucking completion)
Pin No.
Symbol
I/O
Function
8
Standby
SW
Switching regulator
block
CH 1
ON MUTE
muting circuit
Nonlinear amplifier/output
stage
P
o
w
er supply/g
round
shor
ting protection circuit
Ov
er
v
oltage/ther
mal
protection circuit
BEEP
amplifier
Input
amplifier
A
B
D
C
Nonlinear/output stage
Amplifier
output
stage
SW
drive
D
C
B
A
H.L.S.
ST
-BY
RF
PREGND
IN 1
IN 2
ON-TIME
BEEP
VH
VH
SWB
VL
VL
VL
SWGND
+OUT1
+OUT2
NC
-OUT1
-OUT 2
PG1
PG2
H.L.S. :
Higher
Level signal
selector
Ripple
filter
LA4905 (IC301) : 2ch BTL power IC
1. Terminal layput
2. Block diagram
1
23
9 15 14
12 13
16
7
5
6
18
19
17
22
23
1
4
3
2
20
21
10
11
Input
amplifier
CH 2
Pop noise
prevention
circuit
C
C
Summary of Contents for CA-VSDT6R
Page 42: ...VS DT9R VS DT6R 3 2 M E M O ...
Page 57: ...3 17 VS DT9R VS DT6R M E M O ...
