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2-15
HDMIA_5V
HDMIA_5V
J4
TD2+
ACEC
R298
R294
C101
U1
C104
R295
R186
R187
R188
R67
R168
VSSH
R93
ACL
ADA
TD2G
TD2-
TD1+
TD1G
TD1-
TD0G
TD0-
TD0+
TCK+
TCKG
TCK-
CEC
RESE
DSCL
TCEG
+5V
TSDA
HPDE
TGND
TGND
GND
TGND
TGND
1
2
3
4
5
6
8
9
7
10
1
2
3
4
5
6
8
9
7
10
20
19
18
17
16
15
13
12
14
11
CEC_POL
NT
CEC_OUT
RST
Vss
XTAL1
CEC_IN
SDA
XTAL2
SCL
A0
A1
ONT_POL
RSVD7
RSVD6
Vdd
RSVD4
RSVD3
RSVD5
RSVD2
11
12
13
14
15
17
18
16
19
20
22
23
21
1
2
3
4
5
6
8
9
7
10
11
12
13
14
15
17
18
16
19
1
2
3
4
5
6
8
9
7
10
11
12
13
14
15
17
18
16
30
31
32
33
34
35
36
19
20
21
22
23
24
25
27
28
26
29
108
107
106
105
104
103
101
100
102
99
98
97
96
95
94
92
91
93
79
78
77
76
75
74
73
90
89
88
87
86
85
84
82
81
83
80
R246
AP5
AP4
AP3
AP2
AP1
ACLK
Vssc
PD
Vddh93v3
NC
NC
Vssh
RXCC+
Vddh(3v3)
RXCC-
NC
NC
Vssh
RXC0-
RXC0+
Vddh(1v8)
U12
NC
VssH
NC
VCLK
Vsso
CS/FREF
VS/VREF
HS/HREF
DE
VP
RXC1-
RXC1+
Vddh(3v3)
NC
NC
Vssh
RXC2-
Vpp
Vddc(1v8)
RXC2+
Vddc(3v3)
144
143
142
141
140
139
137
136
138
135
134
133
132
131
130
128
127
129
11
5
11
4
11
3
11
2
111
11
0
109
126 125
124
123
122
121
120
11
8
11
7
11
9
11
6
37
VP6
VP7
VP8
VP9
VP10
VP1
1
VP12
VP13
VP14
VP15
VP16
VP17
VP18
VP19
VP20
VP21
VP26
VP27
VP28
VP29
VP22
VP23
VP24
VP25
38
39
40
41
42
44
45
43
46
47
48
49
50
51
53
54
52
66
67
68
69
70
71
72
55 56
57
58
59
60
61
63
64
62
65
Vssc
VP[1]
VP[2]
VP[3]
Vddo(3v3)
Vddc(1v8)
VP[4]
VP[5]
Vsso
VP[6]
VP[7]
VP[8]
VP[9]
VP[10]
VP[1
1]
VP[12]
Vsso
Vddo(3v3)
VP[21]
VP[22]
VP[23]
VP[24]
VP[25]
VP[26]
VP[27]
VP[13] VP[14]
VP[15]
VP[16]
VP[17]
VP[18]
VP[19]
Vddo(3v3)
Vddc(1v8)
VP[20]
Vsso
Vddh(1V8)
RPX2
Vddl(3V3)
TEST2
TEST1
HSCLC
VddC(1V8)
VddC(1V8)
HSDAC
Vssh
RXA2+
RXA2-
RXA2+
RXA2-
R14
R16
R151
R152
Vssh
RXB2-
RXB2+
RXA1+
RXA1-
RXA1+
RXA1-
Vddh(3V3)
RXAC-
Vssh
RXBC+
RXBC-
Vddh(3V3)
A0
Vssc
Vssh
RXB1+
RXB1-
Vddh(1V8)
RXA0+
RXA0-
RXA0+
RXA0-
Vssh
RXB0-
Vddh
RXB0+
RXAC+
RXAC-
RXAC+
TX0-
TX0+
TX1-
TX1+
TX2-
TX2+
Vddh(1v8)
Vddc(1v8)
RRX1
Vssh
Vddh(3v3)
TESTO
HSDAB
HSCLA
HSCLB
HSKAA
SCL
SDA
VAI
Vddi(3v3)
XTALIN/MCLK
Vddc(1v8)
Vssh
XTALOUT
AP0
ACLK
Vsso
VP[29]
VP[28]
Vddo(3v3)
Vssc
Vddh(1v8)
Vssh
Vddh(3v3)
Vddh(3v3)
Vsso
AP5/SYSCLK
Vddo(3v3)
AP3
AP2
AP4/WSJ
AP1
1
2
3
4
5
6
8
9
7
10
11
12
13
14
15
17
18
16
19
20
21
22
23
TD2+
2+
4
4
4
2-
K+
K-
CEC
HPD1
SC
SD
0+
0-
1+
1-
TD2G
TD2-
TD1+
TD1G
TD1-
TD0G
TD0-
TD0+
TCK+
TCKG
TCK-
CEC
RESE
DSCL
DCEG
+5V
DSDA
HPDE
TGND
TGND
TGND
TGND
38
R110
R257
R258
HDMI_ESD_PWR
DDC_DATA_C
DDC_CLOCK_C
VDDH
+3V3STBY
R120
R123
37
36
35
34
33
31
30
32
29
28
27
26
25
24
23
21
20
22
N.C.
TVDD
TGND
N.C. (TD2+)
TGND
TD2-
TGND
TD1-
N.C. (TD1+)
N.C. (TD0+)
TGND
TD0-
N.C. (TCK+)
TGND
TCK-
CEC_OUT
DAT_OUT
HPDO
CLK_OUT
+5V0
+3V3
TGND
TD2+
TGND
(TD2-) N.C.
TGND
(TD1-) N.C.
TD1+
N.C. (TD0+)
TGND
(TD0-) N.C.
TCK+
TGND
(TCK) N.C.
CEC_IN
DAT_IN
HPDI
CLK_IN
1
2
3
4
5
6
8
9
7
10
11
12
13
14
15
17
18
16
19
62
61
63
64
65
66
67
69
70
68
71
72
73
74
75
76
78
79
77
80
39
40
38
37
36
35
34
32
31
33
30
29
28
27
26
25
23
22
24
21
VPB4
VPB5
VPB3
VPB2
VPB1
VCLK
VPB0
VPA6
VPA5
VPA7
Vddd(3v3)
Vssd
Vssc
Vddc(1v8)
VPA4
VPA3
VPA1
VPA0
VPA2
DE/FREF
59
60
58
57
56
55
54
52
51
53
50
49
48
47
46
45
43
42
44
41
2
1
3
4
5
6
7
9
10
8
11
12
13
14
15
16
18
19
4_HPD
17
20
Vddc(1v8)
Vssc
HSYNC/HREF
Vssd
Vssc
Vddc(1v8)
INT
HPD
DDC_SDA
DDC_SCL
VSYNC/VREF
VPB6
VPB7
VPC0
VPC1
VPC2
VPC4
VPC5
VPC3
VPC6
VPC7
Vddd(3v3)
Vpp
AP7
AP6
AP5
AP4
AP2
AP1
AP3
AP0
ACLK
Vddd(3v3)
Vssd
Vssa(PLL_1V8)
Vddc(1v8)
I2C_SCL
RST_IN
I2C_SDA
A0
VSSH
Vssc(PLL_3V3)
A1
Vddha(PLL_3V3)
Vssh
TX2+
TX2-
Vddh(3v3)
TX1-
Vssh
TX1+
TX0+
TX0-
Vddh(3v3)
TXC+
TXC-
Vssh
Vdda(FRO_3V3)
Vssa(FRO_3V3)
EXT_SWING
TM
38
37
36
35
34
33
31
30
32
29
28
27
26
25
24
23
21
20
22
N.C.
TVDD
TGND
(TD2+) N.C.
TGND
TD2-
TGND
TD1-
(TD1+) N.C.
(TD0+) N.C.
TGND
TD0-
(TCK+) N.C.
TGND
TCK-
CEC_OUT
DAT_OUT
HPDO
CLK_OUT
+5V0
U2
R11
R12
D+3V3
D+3V3
D+3V3
GNDA
A+1V8
D+3V3
D+3V3
HDVCC5
HDVCC5
R2
R244
R20
R22
R77
R21
U3
VSSH
NRST
D+1V8C
NXP_DATA
NXP_CLK
R65
A+3V3F
A+3V3
R13
+3V3
TGND
TD2+
TGND
N.C. (TD2-)
TGND
N.C. (TD1-)
TD1+
N.C.
TGND
N.C. (TD0-)
TCK+
TGND
N.C. (TCK-)
CEC_IN
DAT_IN
HPDI
CLK_IN
1
2
3
4
5
6
8
9
7
10
11
12
13
14
15
17
18
16
19
38
37
36
35
34
33
31
30
32
29
28
27
26
25
24
23
21
20
22
N.C.
TVDD
TGND
N.C. (TD2+)
TGND
TD2-
TGND
TD1-
N.C. (TD1+)
N.C. (TD0+)
TGND
TD0-
N.C. (TCK+)
TGND
TCK-
CEC_OUT
DAT_OUT
HPDO
CLK_OUT
+5V0
+3V3
TGND
TD2+
RXC2+
RXC2-
RXC1+
RXC0+
RXC1-
RXCC+
RXCC-
HPD_C
DDC_DATA_C
DDC_CLOCK_C
RXC0-
RXA2+
VDDC1V8
VDDC1V8
VDDC1V8
VDDC1V8
VDDH
VDDH
R175
R60
J20
R131
19977PD
R236
R245
RN7
RN8
RN9
RNX CLOCE TDA9984 IC SIDE
All CAP. close the IC pin
All CAP. close the IC pin
RN10
RN11
RN12
RXCC-
RXCC+
RXC0-
RXC0+
RXC1-
RXC1+
RXC2-
RXC2+
VS_VREF
HS_HREF
DE
VCLK
VDDI
VSSH
VDDH
VSSH
VSSH
VSSH
VDDH
VDDH3V3PLL
C26
C90
C92
C95
C97
C98
C99
C100
C58
VDDO
VDDO
VDDH
R58
R137
C143
BC50
TXC-
TXC+
R59
R57
VDDH1V8
VDDC1V8
VDDH3V3PLL
19977_SPDIF_IN
19977_INT
NRST
NXP_CLK
DCC_DATA_A
DCC_CLOCK_A
HDMI_DDCB_DAT
HDMI_DDCB_CLK
NXP_DATA
R149
R130
R128
R54
R3
R150
R213
MPEG_I2C_CLK
MPEG_I2C_DATA
VDDI
VDDO
VDDC1V8
VSSH
VSSH
VSSH
OPEN
OPEN
1
1
VSSH
VSSH
VSSH
C73
C75
C47
C71
C132
C133
C76
C82
C79
C126
C125
C129
C128
C127
C77
C88
C83
C56
C72
VDDC1V8
VDDC1V8
VDDH1V8
VDDI
R241
R240
C61
Y1
C62
J9
J10
XTI
XTO
XTI
XTO
VDDH1V8
VDDC1V8
VDDO
VSSH
near 91pin
J9/J10 PLACE TOP LAYER NEAR IC
PIN79/AP0=SPDIF OUT
R17
RXA2-
RXA1+
RXA0+
RXA1-
RXAC+
RXAC-
HPD_A
DDC_DATA_A
DDC_CLOCK_A
RXA0-
TGND
(TD2-) N.C.
TGND
(TD1-) N.C.
TD1+
N.C. (TD0+)
TGND
(TD0-) N.C.
TCK+
TGND
(TCK) N.C.
CEC_IN
DAT_IN
HPDI
CLK_IN
HDMI JACK (HDMIA_IN)
HDMI 2 INPUT
J3
TD2+
TD2G
TD2-
TD1+
TD1G
TD1-
TD0G
TD0-
TD0+
TCK+
TCKG
TCK-
CEC
RESE
CDA
CCL
CCEC
R299
R259
GNDA
VSSH
VSSH
VP29
VP28
VP27
VP26
VP25
VP24
VP23
VP22
VP21
VP20
VP19
VP18
VP17
VP16
VP15
VCLK
VP14
VP13
VP12
VP11
VP10
D+1V8C
VP9
VP8
VP7
VP6
DE
VSSH
VSSH
VSSH
VSSH
D+3V3
+3V3STBY
VSSH
GNDA
GNDA
GNDA
D2
VSSH
GNDA
D+3V3
HPD_TV
D+1V8C
NIRQ
VSSH
C29
R37
C37
C141
C36
C35
C34
R36
HS_HREF
VS_VREF
SPDIF_9984_IN
AP5
AP3
AP2
AP1
AP4
ACLK
R215
R76
R214
R78
R79
R80
R55
R82
R83
R73
R81
R72
R74
R296
R158
R71
R23
R28
R297
R15
C13
R169
C23
C107
J2
HDMI JACK (HDMI OUT)
MPEG_I2C_CLK
J11
A+3V3
D+3V3
D+1V8C
A+1V8
C3
C32
C17
C27
C18
C19
C43
C28
C31
GNDA
GNDA
VSSH
VSSH
VSSH
VSSH
C8
C9
C10
C5
C6
A+3V3F
OPEN
OPEN
1
1
J12
C20
J11/J12 PLACE TOP LAYER NEAR IC
MPEG_I2C_DATA
R260
R7
R30
R85
R75
R8
VSSH
VSSH
VSSH
Y4
R84
C80
C81
R66
R43
R86
R87
R94
R174
R48
C30
R49
R189
C119
R243
R242
VSSH
TP27
TP14
TP23
9950_CLK
9950_+3V3
9950_+3V3
9950_+3V3
CEC_OUTPUT
CEC_OUTPUT
CEC_INPUT
CEC_INPUT
BC93
BC98
R47
R46
R45
R44
C78
C103
D1
Q7
R63
NCEC_IRQ
U11
9950_DATA
9950_RAT
CEC_9950
CEC FROM
TDA9950TT
CEC_9950
9950_IN
VSSH
HDMI_CEC
HDMI_DDCB_CLK
HDMI_DDCB_DAT
CEC_9950
HDMI_DDCB_CLK
HDMI_DDCB_DAT
R68
R300
R185
R184
R183
R89
R301
C106
C105
U4
HDMIC_5V
HDMIC_5V
CEC_9950
R96
VDDH
R91
R69
R70
R88
R92
R95
DSCL
TCEG
+5V
TSDA
HPDE
TGND
TGND
TGND
TGND
1
2
3
4
5
6
8
9
7
10
11
12
13
14
15
17
18
16
19
20
22
23
21
HDMI JACK (HDMIC_IN)
HDMI 1 INPUT
<DVD MPEG Section 2>
Summary of Contents for CA-NXT10
Page 37: ... M E M O ...