JVC AV-30W767/S, Schematic Diagrams

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2-9(No.YA390)
CN00Y
R405
X401
C405
C406
R407
IC301
R408
R404
C403
C404
R403
C401
C402
R318
R320
R319
C314
C313
C312
C310 C311
C309
R317 C308
R315
Q301
R313
R316
R311
C307
R412
R413
Q431
C315
C316
C317
HS_OUT
C319
C320
R322
C323
C322
Q452
R461
12V
CONV_RX
R312
R402
R401
VS_OUT
R410
SDA1
SCL1
CONV_TX
CN003
SCL1
P_MUTE
Q432
SDA1
9V
5V
R462
C452 C453
R436
IC451
R433
R460
R459
R432
C457 C456 C455 C454
R431
R451
R458
Q451
R455
R456
C451
X_RAY
R457
PANORAMA
R454
D452 D451 R453
R452
R435
D431
Q401
B1_POW
R434
Y_OUT
PB_OUT
PR_OUT
D302 D301
R301
R302
C318
3.3V
C409
OCP
X402
CN0S3
R414
C324
Y401
R438
R437
C458
R411
C407
C408
R309
R314
C306 C305 C304 C303 C302 C301
R307 R305 R303
R310 R308 R306 R304
R409
D453
R463
R406
OSD_R OSD_G OSD_B OSD_YS OSD_YM
QAX0900-001
/16
Y_IN
CB_IN
CR_IN
F0
F1
SDA
SCL
SCP
HS_IN
VREG5
VBIAS
IREF_HV
AFC_FIL
R_OUT
G_OUT
B_OUT
VCC_OUT
PRE_RGB
SABL_IN
IK_IN
ABL_FIL
ABL_IN
VCC9
VTIM
V_DRV+
V_DRV-
CXA2150AQ
/10
0.5%
/50
/16
/16
/16
/10
/50 0.5% /10 /10
/10
/16
/16
F
/16
/10
ABL
X_RAY
DEF_HP
PANORAMA
FBP
EHT( DC)
NECK
EW
DEF_VP
V_DRIVE-
B1_POW
GND
H_DRIVE
GND
OCP
QGB1506L1-16
/50
BA10393F-XE
MY
QFLC1HJ-472Z
MY
0.5%
0.5%
/50
NCB31AK-684X
V-SYNC
H-SYNC
GND
QGA2501C5-03Z
/10
LOWE
CONV_B CONV_G CONV_R GND CONV_YS HS GND CONV_RX CONV_TX NC VS NC
GND_OUT
YSYM2
GND_SIG
B2_IN
G2_IN
R2_IN
YSYM1
B1_IN
G1_IN
R1_IN
PABL_FIL
DPDT_OFF
YF_OFF
VM_OUT
VM_MOD
CLP_C
BPH
IREF_YC
VCC5
CERA HPROT VPROT
HCOMP_IN VCOMP_IN L2_FIL HP_IN H_DRV GND_H
VS_IN
HC_PARA
GND_V MP_PARA DF_PARA EW_DRV V_OSC V_AGC VSAW0 VSAW1
QFP31HJ-104
/16
F
/16
F
/16
F
/16
F
/16 /16 /16
NRSA02J-0R0X
VCC
GND
*
470
0.01
0.1
2.7k
3.3k
8.2k
1
0.01
10k
100
0.1
OPEN
100
100
0.1
0.1
0.1
100 0.01
4.7
4.7k 0.47
0
*1
4.7k
OPEN
3.3M
0.47
100
*
*1
0.01
100
0.1
0.1
0.1
10k
100
0.01
*1
2.2k
100
OPEN
0
OPEN
*1
4.7k
10 .0015
15k 15k
10k
180
47k
OPEN OPEN OPEN
10k
0
1k
*1
47k
10k
.01
1k
1k
DI OPEN OPEN
10k
47k
OPEN
*1
10k DI DI
1k
1k
10
OPEN
OPEN
2.2
0
OPEN
OPEN
10/50
100 0.1
*
100
0.1 0.1 0.1 0.1 0.1 0.1
* * *
* * * *
0
2.7k
0
GND
V_DRIVE-
GND
DEF_HP
GND
EW
GND
FBP
H_DRIVE
NECK
DEF_VP
GND
DEF_HP NECK H_DRIVE FBP DEF_VP V_DRIVE-
SHEET1
SHEET2,4
SHEET2
SHEET1
SHEET4
SHEET2
SHEET2
SHEET1,2
SHEET1
SHEET4
SHEET1
RGB & DEF PROCESSOR
OPEN
POWER & DEF
PWB ASS'Y
CN2003
(SHEET6)
OPEN
MAIN PWB CIRCUIT DIAGRAM (3/4) SHEET 3