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DRAM Timing Settings
Please refer to section 3-6-1
AGP Function Settings
Please refer to section 3-6-2
Memory Hole
You can reserve this area of system memory for ISA adapter ROM. When this area is
reserved, it cannot be cached. The user information of peripherals that need to use this area of
system memory usually discusses their memory requirements. The settings are: Enabled and
Disabled.
System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh, resulting in
better system performance. However, if any program writes to this memory area, a system
error may result. The settings are: Enabled and Disabled.
Video RAM Cacheable
Select Enabled allows caching of the video BIOS, resulting in better system performance.
However, if any program writes to this memory area, a system error may result. The settings
are: Enabled and Disabled.
Memory Parity/ECC Check
This function provides parity check of memory.
The choice is either Disabled or Enabled.
3-6-1 DRAM Timing Settings
CMOS Setup Utility – Copyright(C) 1984-2000 Award Software
DRAM Timing Settings
Item Help
Auto Configuration Standard
RAS Precharge Time 3T
RAS Active Time 6T
Activate to Command Delay 3T
CAS Latency Auto
Bank Interleave Auto
DRAM Drive Control Auto
Delay DRAM Read Latch 0.5ns
Memory Data Drive Normal
SDRAM Command Drive Weak
Menu Level >>
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