SP-5000M-PMCL / SP-5000C-PMCL
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5.3.6 Line Format
Indicates the interface information of the input and output lines.
Not connected, TTL, LVDS or Opto-coupled
Note: In the SP-5000-PMCL, Opto-coupled interface is not available.
5.3.7 GPIO
GPIO is a general interface for input and output and controls the I/O for trigger signals and
other valid signals and pulse generators. By using this interface you can control an external light
source, make a delay function for an external trigger signal, or make a precise exposure setting
together with a PWC trigger.
5.3.7.1 Basic block diagram
The basic block diagram is as follows.
In the SP-5000-PMCL, the pixel clock is 48 MHz.
Soft Trigger
LVAL IN
FVAL IN
Exposure Active
Frame Trigger Wait
Frame Active
GPIO 4 (TTL IN 1)
GPIO 7 (CL CC1)
GPIO 10 (TTL IN2)
GPIO 11 (LVDS IN)
Pixel Clock
Cross Pont
Switch
12 bit Counter
INV
INV
INV N
NAND
INV
Non INV
Pulse Generator
20 bit counter x 4
CLR
Sel Bit (5,0)
Sel Bit (7)
Sel Bit (7)
Pulse Generator 0
Pulse Generator 1
Pulse Generator 2
Pulse Generator 3
Trigger 2 (Frame Start)
GPIO 1 (TTL OUT 1)
GPIO 8 (TL OUT 2)
GPIO 9 (TTL OUT 3)
Sel Bit (7)
Clock IN
Clear IN
Gate 1
Gate 2
Fig.6
GPIO interface
Note: Items written in blue letters are available if the AUX Type 3 option is selected.