CV-A20
CL / CV-A80
CL
5.3.
Input and output circuits
In the following schematic diagrams, the input and output circuits for video and timing signals are
shown.
5.3.1.
Iris video output
Fig.8 Strobe Output circuit
ith
s
Fig.5 Iris video output
This signal can be used for lens iris control in Continuous
mode. The signal is taken from the PGA out in the sensor.
This video output is without sync. The signal is 0.7 V p-p w
low impedance.
5.3.2.
Trigger input
An external trigger input can be applied to pin
10 of 12-pin Hirose connector (when the
command TI=1 has been set). The input is AC
coupled. To allow long pulses the input circuit i
designed as a flip-flop circuit. The leading and
trailing edges of the trigger pulse activate the
circuit.
Fig.6 Trigger input circuit
The trigger polarity can be changed by TP=1.
The default trigger input level is 4V ± 2V, TTL.
By changing the camera internal switch (SW 1),
the input impedance can be changed to 75
Ω
DIP SW 1
Top Cover
Trigger input impedance
ON : 75
Ω
OFF : TTL (Default)
I nt er nal DI P SW
Rear Panel
1
2
O
N
Fig. 7. DIP SW1 location
5.3.3.
Strobe output
The Strobe output is available at pin 9 of 12-pin connector.
This signal controls the timing of Strobe flashing. In
continuous mode, it is high during the blanking period.
When the camera is set to snap-shot trigger mode, the
output is high during the exposure period.
7
