Jäger ADwin-Pro, System And Hardware Description

Page: 76 / 218

Pro I: Analog Input Modules
Pro-AIn-F-8/14 Rev. B
ADwin
72
ADwin-Pro Hardware, manual version 2.9, June 2006
Fig. 128 – Pro-AIn-F-8/14-D Rev. B: Pin assignment differential
Fig. 129 – Pro-AIn-F-8/14 Rev. B : Board and front panel
Accuracy INL max. ±2 LSB
(>1000ksps ±3 LSB, >1500ksps ±4 LSB)
DNL ±2 LSB typical
Input resistance 100k
Ω
, ±2%
Input over-voltage ±35V
Offset error adjustable
Offset drift ±30 ppm/ºC of full scale range
Connector 8 LEMO sockets
optional: 37-pin DSub socket
Fig. 127 – Pro-AIn-F-8/14 Rev. B : Specification
ANALOG IN 1 (-)
ANALOG IN 2 (-)
ANALOG IN 3 (-)
ANALOG IN 4 (-)
ANALOG IN 5 (-)
ANALOG IN 6 (-)
ANALOG IN 7 (-)
ANALOG IN 8 (-)
AGND
RESERVED
ANALOG IN 1 (+)
ANALOG IN 2 (+)
ANALOG IN 3 (+)
ANALOG IN 4 (+)
ANALOG IN 5 (+)
ANALOG IN 6 (+)
ANALOG IN 7 (+)
ANALOG IN 8 (+)
AGND
RESERVED
DGND
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
RESERVED
RESERVED
19ADF0801
A0 A1 A2 A3 A4 A5 A6 A7
OCX
40MHz
DC/DC CONVERTER
IN 4.5-9V OUT ±15V / ±100mA
DC/DC CONVERTER
IN 4.5-9V OUT ±5V / ±250mA
XC2S200
XILINX
®
T
C
55V
16100F
T
-12
LM3940
-3.3
LM2937
-2.5
AT17
LV020
OP
A
2132
ON DIP
1 2 3 4 5 6 7 8
LT
C
485
OP
A
2132
OP
A
2132
AD
M
706
AD
M
706
PG
A2
0
6
PG
A2
0
6
PG
A2
0
6
PG
A2
0
6
D
S
1867
-1
00
D
S
1867
-1
00
D
S
1867
-1
00
D
S
1867
-1
00
LT
C
1414C
G
N
LT
C
1414C
G
N
LT
C
1414C
G
N
LT
C
1414C
G
N
PG
A2
0
6
PG
A2
0
6
PG
A2
0
6
PG
A2
0
6
D
S
1867
-100
D
S
1867
-100
D
S
1867
-100
D
S
1867
-100
LT
C
1414C
G
N
LT
C
1414C
G
N
LT
C
1414C
G
N
LT
C
1414C
G
N
OP
A
2132
AIN-F8/14
ANALOG
INPUT
1
2
3
4
5
6
7
8
AIN-F8/14
ANALOG
INPUT