Pro II: Digital-I/O Modules
Pro II-PWM-16 Rev. E
ADwin
132
ADwin-Pro II
Hardware, manual Dec. 2018
5.7.10 Pro II-PWM-16 Rev. E
The output module Pro II-PWM-16 Rev. E generates pulse width modulated
signals (PWM signals) at 16 outputs. Each (PWM) signal can be configured
individually via software; that means, they can be configured separately.
The module is available as version Pro II-PWM-16-I Rev. E, too. On this mod-
ule, the outputs are optically isolated against the system circuit and against
each other. The event input, too, is optically isolated from the system circuit.
The output signals are clocked with a reference clock speed of 100MHz.
The lowest output frequency is about 0.6Hz.
The highest output frequency where the duty cycle can be still defined in
1%-steps, is 1000kHz.
above: Pro II-PWM-16 Rev. E, below: Pro II-PWM-16-I Rev. E
Fig. 119 – Pro II-PWM-16 Rev. E: Block diagram
Data
Data
A B
A B
NOTE:
Only PWM-output #1 is shown for clarity of the schematic. The 5MHz clock signal is distributed to all prescalers.
G
5 MHz
Prescaler #1
divide by 2
n
(n = 0...7)
Control registers #1
16 bit HIGH-time Register #1
16 bit Counter #1
16 bit LOW-time Register #1
Q
Q
S
R
B
A
A
B
EN
EN
CLK
EN
CLR
PWM #1
AD
w
in
-P
ro
II
bus
Data
to other
Prescaler
Data
EVENT
10
k
Data
Data
A B
A B
NOTE:
Only PWM-output #1 is shown for clarity of the schematic. The 5MHz clock signal is distributed to all prescalers.
G
5 MHz
Prescaler #1
divide by 2
n
(n = 0...7)
Control registers #1
16 bit HIGH-time Register #1
16 bit Counter #1
16 bit LOW-time Register #1
Q
Q
S
R
B
A
A
B
EN
EN
CLK
EN
CLR
AD
w
in
-P
ro
II
bus
Data
to other
Prescaler
Da
ta
GN D
#1
Vcc
BC489
1N
4001
+
-
EVENT
24V
12V
5V
1k
56
k
56
k
4k3
2k
560
