Jackson Labs LTE-Lite, User Manual

Page: 25 / 34

© 2020 Jackson Labs Technologies, Inc. 21
LTE-Lite User Manual
Table 2.3 shows the LTE-Lite SMT Module pin description.
All IO pins are internally pulled-up or pulled down so that the user does not have to terminate any
unused pins. All unused pins can be left floating.
Table 2.3 LTE-Lite SMT Module IO pin description
Pin Name Function Specification Usage
1 EFC Output External Oscillator
EFC control 0V to 3.0V, 4.6K Ohms output
impedance Connect to frequency control input of
optional external oscillator.
2 NC No Connect Do Not Connect Do Not Connect
3 INIT_SURVEY# Initiates an Auto
Survey process Pull to ground to activate, internally
pulled-up Pulling this pin low manually initiates
an Auto Survey process when in
Timing GPS mode
4 1PPS-OUT 1PPS Signal
Aligned to UTC +3.3V CMOS 1PPS Output, can
drive up to +/-10mA This 1PPS output signal is aligned to
UTC(GPS) and has very low jitter. It
is generated by the TCXO and will be
active asynchronously if the GPS
receiver has not had a GPS fix after
power-on, and it will continue to be
generated in GPS holdover mode
5 GND1 20MHz output return Ground Electrical Ground return for the
20MHz RF output pin
6 RF OUT/IN 19.2MHz/20MHz
RF Output from
TCXO (default) or
RF input (External
TCXO option) 3.3V CMOS, can supply up to
+/-24mA, buffered TCXO output
by default.
3.3V CMOS or TTL input when
internal TCXO is disabled by
pulling pin 8 high. Must be between
-0.2V to 3.4V max on this pin when
driving from external sources By default this pin is a buffered
version of the internal TCXO RF
output. This pin becomes a
CMOS/TTL input when disabling the
internal TCXO by pulling pin 8 high.
In external TCXO mode this pin
receives the RF output of the external
Oscillator. Allowable frequencies for
external oscillator mode: 10MHz,
15.36MHz, 19.2MHz, and 20MHz
7 PHASELOCK/
RESET# Indicates Phase
Lock of internal
Synthesizer 3.3V CMOS indicates
PHASE-LOCK, 0V indicates
unit is not ready yet. Goes high
typically 1 second after system
reset Indicates readiness of the
synthesized RF output on the
CLOCKOUT pin 24. Can be used as
a generic RESET# signal by external
user circuitry as it stays low for about
1 second, then goes high and stays
high after system power-on or
system reset.
8 DISABLE-
TCXO Disables Internal
TCXO and output
buffer Pull high to disable internal
TCXO. Internally pulled to
ground Pulling this pin high disables the
internal TCXO and output
buffer, and allows an external
oscillator to feed RF into pin 6
for disciplining of external
oscillators
9 GND2 Ground Ground Ground. Connect all module
grounds together