IRT DDC-3480 Instruction Book Download Page 21

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ENG. APP.

CONTRACT No.

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IRT Electronics Pty. Ltd.

DRAWING No.

COPYRIGHT

ARTARMON NSW AUSTRALIA 2064

A3

804154

1

O

F

 

1

MPEG-2 ASI

U9

XTAL 1

 

4

U10

22

23

10u

P1/21AB

P1/22AB

P1/25AB

P1/26AB

P1/23AB

P1/24AB

RS1

P1/27AB

P1/28AB

12

6

26

3

25

1

T1

113B7

2

6

5

24

1

7

8

9

10

11

12

13

15

17

18

20

21

22

23

U5

10

7

5

3

23

22

U12

11

12

14

16

18

17

15

13

2

3

4

5

6

25

26

27

28

4
9

21

24

1

P1/31AB

19/AB

18/AB

XR-T7296

CY7923

CYC419

27MHz

25

6

8

21

19

TP3

U15

 
26

8

3

4

7

MAX704

RS2

RS3

1

2

3

4

5

7

2

14

24

1

11

16

8

27

28

OPTICAL

OPTION

9

8

26

5

10

21

27

28

1

2

16

8

7

4K7

4K7

360R

100n

D8

D2

D1

D0

D3

D6

D5

D4

/FL/RT

/W

/XO/HF

Q6

Q5

/R

Q8

Q3

Q2

Q1

Q0

/FF

/X1

Q4

/MR

/EF

D7

SC/D

D7

D6

D4

D2

D0

D1

D3

D5

SVS

MODE

/BISTEN

/END

Vcc

FOTO

CKW

GND

OUTA-

RP

OUTC+

OUTC-

OUTB-

OUTB+

OUTA+

CKW

/ENN

Vcc

Vcc

ENCODIS

TCLK

TNDATA

TPDATA

RCLK

RLOOP

TAOS

GNDD

GNDA

RPDATA

RNDATA

TRING

TTIP

TXLEV

DS3/E3

DECODIS

BVP

Vdd

LLOOP

LK4

LK3

LK2

LK1

SYS /CLK

INT /OUT

LED4

LED3

LED2

LED1

CY_CKR

CY_SCD

CY_ABSEL

CY_RF

CY_RDY

CY_RVS

FIFO_RT

FIFO_WR

FIFO_HF

ASI_IN1

ASI_IN3

FIFO_RD

ASI_IN7

VCCIO

ASI_IN4

ASI_IN2

ASI_IN0

FIFO_FF

FIFO_XI

FIFO_MR

ASI_IN5

FIFO_EF

CY_SO

VCCINT

VCCIO

NC

VCCINT

VCCIO

VCCIO

VCCIO

DMV_CLK

DMV_OUT

PSYNC

DVALID

SPI1

RELAY

TP_DATA

TN_DATA

TCLK

ENCODIS

SYS RST

RMS Q2

RMS Q1

RMS A1

RMS A2

SPI_CLK

SPIENA

SW2 B

SW2 A

SW1 B

SW1 A

/RESET

Vbatt

-MR

VCC

PFI

GND

SW

XTAL 2

34.368MHz

44.736MHz

OR

1

14

8

7

ASI_IN6

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B1

+B2

+5a

14

+5a

+5b

+5a

+5a

+5b

+5b

+5b

+5b

+5b

+5b

+5b

+5b

+5b

+5b+5b

+5b

+5b

+5b

+5b

+B1

+B2

+B6

+B6

+B6

+B6

+B6

+B3

+B3

+B4

+5a

142

133

135

134

132

128

122

120

116

115

119

121

112

111

131

144

136

149

147

148

150

127

141

189

191

SPI3

SPI2

SPI4

SPI5

SPI6

SPI7

SPI0

1

9

6

193

198

200

202

203

13

12

11

205

53

55

58

60

64

85

18

41

28

38

101

79

44

45

46

47

87

89

97

94

169

167

83

39

30

25

17

EPF10K10QC208

DDC-3480 

TO G703 CONVERTER

(/34 or /45)

9

1

2

3

4

5

6

10

1

3

4

2

8

7

5

EPC1441

DCLK

ConfDone

nConf

nStatus

DATA0

mSel0

mSel1

nCE

 2

B1+

155

105

 52

156

U9 (PART)

J7

U11

B1+

108

107

154

IN HDB3

OUT B3ZS

LK5 B3ZS LEVEL

LK7 

IN  > 225ft

OUT < 225ft

U16

4

NC7S32

2  13/04/00

ECR1135

3  05/10/00

4

2

+B4

U8

74HCT1G04

5

3

ECR1168

4  03/01/01

LK1

LK2

LK3

LK4

2

1

LED1

ASI INPUT LOSS

2

1

LED2

TS SYNC ERROR

2

1

LED3

188 Byte

2

1

LED4

204 Byte

1

3

2

EMI1

DSS306

1

3

2

EMI2

DSS306

1

3

2

EMI3

DSS306

1

3

2

EMI4

DSS306

1

2

3

AC

FUSE1

1R

FUSE2

1R

FUSE3

1R

FUSE4

1R

LD4

IND

6

1

4

3

DB1

DB106

6

1

4

3

DB2

DB106

VIN-

2

VIN+

1

+V

4

-V

3

5

CONV

ZS32405

CD67

220u

B2

BEAD

LK5

LK7

SK1

G703 OUT

B6

BEAD

CD2,8,13,17

10u

B1

BEAD

TP1

LED6

POWER

1

2

J2

ALARM

3

1

2

LK9

3

1

2

LK8

CD64

220u

2

3

7

8

4

1

6

U13

LM311

B

11

A

12

G

15

Q

10

!Q

9

!R

13

C

14

U14B

VCC

1

DO

14

AEC-

7

AEC+

6

CD

5

VCC

4

OEM

3

VCC

2

DI

8

DI

9

VEE

10

VEE

11

MUTE

12

DO

13

U6

CLC014

C4

10u

C3

10u

CD48,62

10u

B

5

A

4

G

1

Q

6

!Q

7

!R

3

C

2

U14A

74HC4538

R76

0R

R74

0R

R19

10K

R20

10K

C18

1u

C1

100n

R3

75R

R4

100R

R5

100R

R21

33R

R22

33R

R32

10K

R35

10K

2

1

D1

1N4148

CD16

100n

CD61

100n

C59

100n

CD73

100n

CD58

100n

CD1,19,22,20,21,25,12

100n

CD29

100n

R40

22R

R39

22R

R30

22R

LD3

IND

R6

75R

C5

100pF

C9

100n

R10

0R

R65

1K

CD75

100n

CD60

100n

CD63

100n

CD74

100n

R67

10K

LK6

NC

NO

CD32

10u

TP6

C2

100n

SK2

ASI IN

CD72

100n

CD70

100n

CD71

100n

CD68

100n

C66

100n

CD69

220u

LD2

IND

LD1

IND

R33

47K

R34

47K

R38

10k

CD24,31

10u

2

1

D7

BAS32L

2

1

D6

BAS32L

2

1

D4

BAS32L

CD30

10u

CD56,57

10u

CD54

100n

B3

BEAD

B4

BEAD

B7

R64

10K

CD28

100n

RL1

2

1

D9

BAS32L

CD14

330u

CD11

330u

R71

75R

R15

75R

R57

22R

CD5,6,7,15,26,35,47

49,50,51,52,65

CD33,36,37,38,39,40,41

CD42,43,44,45,46,53

L1

IND

L2

33n

R1

120

R50

1K

R56

1K

R55

1K

R58

1K

R51

10K

R63

330R

R16

0R

2

1

D5

BAS32L

R43

22R

R9

1M

C16

100n

CD9

C

IRT 

Communications 

www.irtcommunications.com

Summary of Contents for DDC-3480

Page 1: ...e Internet at http www irtelectronics com I R T Electronics Pty Ltd A B N 35 000 832 575 26 Hotham Parade ARTARMON N S W 2064 AUSTRALIA National Phone 02 9439 3744 Fax 02 9439 7439 International 61 2...

Page 2: ...Connections 9 Front rear panel connector diagrams 9 Operation 10 Basic operation 10 Front indicators 10 Maintenance storage 11 Warranty service 11 Equipment return 11 Characteristics of signal types 1...

Page 3: ...lower processing speed requirements The ASI O interface is of limited usefulness due to the specification of multimode fibre with only a short haul capability Optical transport of ASI can be better ac...

Page 4: ...MPEG2 TS formats Interleaving or de interleaving Reed Solomon insertion correction Spectrum dispersion correction Signal monitoring for remote alarm indications DDC 3470 only Block diagram DDC 3480 8B...

Page 5: ...ink 2 pin 0 1 IDC male connector Power Requirements 28 Vac CT 14 0 14 or 16 Vdc Power consumption 5 VA Other Temperature range 0 50 C ambient Mechanical Mounts in IRT FRU 1030 1 RU 19 rack chassis wit...

Page 6: ...t The G 703 output is the processed TS format The G 703 output is disabled during loss of ASI input Input Loss Alarms The Input Loss Alarm will be asserted in the absence of a valid ASI input Input TS...

Page 7: ...ry to convert from one rate to another involve changing firmware crystals and other components in addition to setting links detailed below After making these changes the whole module must be tested fo...

Page 8: ...etween signal earth and chassis earth No attempt should be made to break this connection Installation in frame or chassis The 3400 series of modules may only be mounted in IRT s FRU 1030 type 1 RU cha...

Page 9: ...t is available This is set by link LK 5 and should be set to correspond to the length of cable connected to the output This is necessary only if a shaped characteristic is required for short cable len...

Page 10: ...cted at the input for a given time MPEG 2 TS always contain a sync byte every 204 or 188 bytes irrespective of data content Therefore if 2040 or more consecutive 1 s or 0 s are been detected then the...

Page 11: ...inable from the component supplier Equipment return Before arranging service ensure that the fault is in the unit to be serviced and not in associated equipment If possible confirm this by substitutio...

Page 12: ...ta transfer is synchronised to the Byte clock of the MPEG transport stream The data to be transmitted are MPEG 2 transport packets The data signals are synchronised to the clock depending on the trans...

Page 13: ...rial data stream The disparity characteristics of the code maintain DC balance Special characters are defined as extra code points beyond the need to encode a Byte of data One in particular is used to...

Page 14: ...e PRBS registers is initiated at the start of every eight transport packets To provide an initialisation signal for the de scrambler the MPEG 2 sync Byte of the first transport packet in a group of ei...

Page 15: ...Byte stream by the input switch Each branch is a First In First Out FIFO shift register with depth Mj cells where M 17 N I N 204 error protected frame length I 12 interleaving depth branch index The c...

Page 16: ...dB Electrical characteristics CCITT G 703 34368 Kb s Cable type Coaxial Impedance 75 Signal level 1 0 V Nominal pulse width 14 55 ns Code conversion HDB3 Pulse shape Fig 17 G 703 Jitter at input port...

Page 17: ...simplifying system design Note that the ASI signal is polarity sensitive Although most 270 Mb s SDI DA s and switchers will pass ASI signals the line drivers used usually have both inverted and non i...

Page 18: ...11 12 GHz satellite services ETS 300 429 Digital broadcasting systems for Television sound and data services framing structure channel coding and modulation for cable systems ETS 300 473 Digital broad...

Page 19: ...U CCITT recommendation G 703 HDB3 High Density Bi polar of order 3 IF Intermediate Frequency IRD Integrated Receiver Decoder ITU International Telecommunications Union LSB Least Significant Bit LVDS L...

Page 20: ...17 10 2007 Drawing index Drawing Sheet Description 804154 1 DDC 3480 45 ASI to G 703 circuit schematic 804154 2 DDC 3480 8 ASI to G 703 circuit schematic I R T C o m m u n i c a t i o n s w w w i r t...

Page 21: ...5 58 60 64 85 18 41 28 38 101 79 44 45 46 47 87 89 97 94 169 167 83 39 30 25 17 EPF10K10QC208 DDC 3480 TO G703 CONVERTER 34 or 45 9 1 2 3 4 5 6 10 1 3 4 2 8 7 5 EPC1441 DCLK ConfDone nConf nStatus DAT...

Page 22: ...0 TO G703 CONVERTER 9 1 2 3 4 5 6 10 1 3 4 2 8 7 5 EPC1441 DCLK ConfDone nConf nStatus DATA0 mSel0 mSel1 nCE 2 B1 155 105 52 156 U9 PART J7 U11 B1 108 107 154 RNEG RCLK 15 17 16 8 U17A 1 2 3 U17A 5 4...

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