4280-dda.ib.rev0.doc
Page 4 of 17
11/03/2009
Functional Diagrams
J 3
ZDA-4300RH Handshake Diagram
J 2
J 4
INPUT
1J1
RELAY
RL1.1
RELAY
RL1.2
OUTPUTS
DDA-4280
SIGNAL
PROCESSING
RELAY
RL5-2
INPUT
2J1
RELAY
RL1.1
RELAY
RL1.2
RELAY
RL5-2
RL2-1
RL2-1
RL3
RL3
Output Driver
FPGA
E1Generator,
Change over logic,
AIS Detector
INPUT
(SK5)
RL1-2
OUTPUTS
(SK4)
Data Reg. with
Jitter Att
MON
(SK2)
Block diagram DDA-4280 - Signal path
(SK9)
(SK8)
Output Driver
Output Driver
Output Driver
Output Driver
(SK13)
RL1-1
O/P 1
O/P 4
O/P 3
O/P 2
GND
(SK6-3)
SNMP
Control
RL5-2
RL2-2
RL2-1
RL3-1
General Alarm
(SK6-2)
Power Fail Alarm
(SK6-1)
DDA-4280
SIGNAL
PROCESSING
