Hardware Operations
24
2.5.2 DIMM Population Rule
For two slots per channel configurations, the Romley-EP platform requires DIMMs within a
channel to be populated starting with the DIMMs farthest from the processor in a
“fill-farthest”
approach. In addition, when populating a Quad-rank DIMM with a Single- or Dual-rank DIMM
in the same channel, the Quad-rank DIMM must be populated farthest from the processor.
Intel MRC will check for correct DIMM placement. Additionally, Intel strongly recommends that
all designs follow the DIMM ordering, command clock, and control signal routing documented
in below figure. This addressing must be maintained to be compliant with the reference BIOS
code supplied by Intel. All allowed DIMM population configurations for two slots per channel
are shown in below tables.
When one DIMM is used, it must be populated in DIMM slot0 (farthest away from the CPU) of
a given channel.
A maximum of 8 logical ranks (ranks seen by the host) per channel is allowed.
When single, dual and quad rank DIMMs are populated for 2DPC, always populate the higher
number rank DIMM first (starting from the farthest slot), for example, first quad rank, then dual
rank, and last single rank DIMM.
Summary of Contents for B800
Page 1: ...About This Manual i Board B800 May 2012 Revision A 1 ...
Page 3: ...About This Manual iii ...
Page 16: ...viii Canadian Notice Avis Canadien Class A Equipment Japanese Notice Taiwanese Notice ...
Page 29: ...Hardware Operations 12 ...
Page 38: ...Hardware Operations 21 Figure 2 9 DIMM Socket Location ...
Page 42: ...Hardware Operations 25 DDR3 RDIMM Population DDR3 UDIMM Population DDR3 LRDIMM Population ...
Page 43: ...Hardware Operations 26 DDR3L RDIMM Population 1 35V DDR3L UDIMM Population 1 35V ...
Page 44: ...Hardware Operations 27 ...
Page 74: ...57 BIOS Setup Utility Utility and POST Code Chapter 4 BIOS Setup ...
Page 112: ...Appendix China RoHS Regulations ...
Page 113: ...Appendix TBD I Appendix China RoHS Regulations Appendix Figure I China RoHS Regulations ...