Open-X™ 8M Development Kit based on the NXP i.MX8™ Processor User Guide Version 1.0
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Copyright Intrinsyc Technologies Corporation
JTAG Header J801
Figure 3-11 JTAG Header J801
This connector provides a JTAG interface to the main processor. The i.MX 8MDQLQ Applications
Processor accepts five JATG signals from an attached debugging device on dedicated pins. A sixth pin
on the processor accepts a board HW configuration input, specific to the Open-X 8M board.
Note:
Intrinsyc does not provide software support for JTAG.
Table 3.8.6-1 JTAG Header Pinout, J801
Description
Signal
Pin NO Pin
NO
Signal
Description
TMS Signal
TMS
J801 [2]
J801 [1]
JTAG_PWR
3V3 JTAG Power
detect
TCK Signal
TCK
J801 [4]
J801 [3]
GND
Ground
TDO Signal (Target
Data Out)
TDO
J801 [6]
J801 [5]
GND
Ground
TDI Signal (Target
Data In)
TDI
J801 [8]
J801 [7]
NC
Not Connected
, not connected
POR_B
(NC)
J801 [10]
J801 [9]
TRST_N
(NC)
Target RESET_N
signal, not connected
