Intersil ISL8201M User Manual Download Page 8 | Manualshive

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AN1386.1

December 23, 2009

FIGURE 11. MIDDLE-1 LAYER

FIGURE 12. ISL820xMEVAL1Z, MIDDLE-2 LAYER

Printed Circuit Board Layers

(Continued)

Application Note 1386

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Summary of Contents for ISL8201M

Page 1: ...tic 3 Efficiency and Output Ripple Noise Measurement 4 Schematic 5 Bill of Materials 6 Printed Circuit Board Layer 7 List of Figures Evaluation Board of POL Module 2 Quick Start 3 Quick Start Schematic 3 Wide Input Range Schematic 3 Efficiency Measurement Schematic 4 Equipment Setup for Efficiency Measurement 4 Output Ripple Noise Measurement Method 4 Schematic 5 Top Over Layer Component Location ...

Page 2: ...tion The user can easily set the output voltage by changing the value of R1 refer to Figure 8 Installation Recommended Operating Specification The recommended operating specification for input output and PVCC bias range is shown as Table 2 Table 3 lists the typical application s various output voltages and its corresponding resistance FIGURE 1 EVALUATION BOARD OF POL MODULE TABLE 1 TEST EQUIPMENT ...

Page 3: ...n board delivers power to the Electronic Load If the input voltage is 5V or 12V the PVCC bias does not require additional supply and it can connect to the input side directly by pushing switch S1 to the up state Figure 3 shows the ISL820xMEVAL1Z application schematic for 5V or 12V input voltage The PVCC pin can connect to the input supply directly Typical Application Schematic Typical Application ...

Page 4: ... due to the high frequency events which can be magnified by the large ground loop formed by the oscilloscope probe ground This means that even a few inches of ground wire on the oscilloscope probe may result in hundreds of millivolts of noise spikes when improperly routed or terminated This effect can be overcome by using the short loop measurement method to minimize the measurement loop area for ...

Page 5: ...EVAL1Z has integrated 4 12kΩ and ISL8204MEVAL1Z has integrated 2 87kΩ 4 R18 C18 and C19 are the snubber network which can reduce the stress for internal semiconductor 5 R13 R14 C12 C13 C14 and C15 are the external compensation network The ISL820xMEVAL1Z has integrated the type 3 compensation network inside the module for typical applications 6 R15 R16 R17 R20 R21 C17 Q2 and Q3 are the power up seq...

Page 6: ...10µF 25V MURATA TDK C5 Capacitor POS Capacitor 330µF 6 3V SANYO C5A Capacitor Not installed C6 Capacitor Not installed C6A Capacitor Ceramic Capacitor 22µF 10V MURATA TDK C7 Capacitor Ceramic Capacitor 22µF 10V MURATA TDK C7A Capacitor Not installed MURATA TDK C8 Capacitor Ceramic Capacitor 22µF 10V MURATA TDK C8A Capacitor Not installed C9 Capacitor Not installed C10 Capacitor Ceramic Capacitor 1...

Page 7: ...7 AN1386 1 December 23 2009 Printed Circuit Board Layers FIGURE 9 TOP OVER LAYER COMPONENT LOCATION FIGURE 10 TOP LAYER COMPONENT SIDE Application Note 1386 ...

Page 8: ...8 AN1386 1 December 23 2009 FIGURE 11 MIDDLE 1 LAYER FIGURE 12 ISL820xMEVAL1Z MIDDLE 2 LAYER Printed Circuit Board Layers Continued Application Note 1386 ...

Page 9: ...tioned to verify that the Application Note or Technical Brief is current before proceeding For information regarding Intersil Corporation and its products see www intersil com AN1386 1 December 23 2009 FIGURE 13 BOTTOM LAYER COMPONENT SIDE MIRRORED FIGURE 14 BOTTOM OVER LAYER COMPONENT LOCATION MIRRORED Printed Circuit Board Layers Continued Application Note 1386 ...

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