1
®
AN1288.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Using the ISL8105BEVAL1Z, ISL8105BEVAL2Z
PWM Controller Evaluation Board
Introduction
The ISL8105B is a simple single-phase PWM controller for a
synchronous buck converter that operates from +5V or +12V
bias supply voltage. With integrated linear regulator, boot diode,
and gate drivers, the ISL8105B reduces external component
count and board space requirements.
The ISL8105BEVAL1Z, ISL8105BEVAL2Z evaluation board
highlights the operations of the controller in a DC/DC
application.
ISL8105BEVAL1Z , ISL8105BEVAL2Z
Reference Design
The ISL8105BEVAL1Z, ISL8105BEVAL2Z evaluation board
is designed to optimize for the output voltage and current
specifications shown in Table 1.
Two versions of the evaluation board, based on the package
type, are listed in Table 2.
Design Procedure
The following sections illustrate simple design steps and
component selections for a converter using the
ISL8105BEVAL1Z, ISL8105BEVAL2Z.
Output Inductor Selection
The output inductor is chosen by the desired inductor ripple
current, which is typically set to be approximately 40% of the
rated output current. The desired output inductor can be
calculated using Equation 1:
In the evaluation board, a 1µH inductor with 1.87m
Ω
DCR
(Cooper Bussmmann’s HC9-1R0-R) is employed. This yields
approximately 0.44W conduction loss in the inductor.
Output Capacitor Selection
The output capacitors are generally selected by the output
voltage ripple and load transient response requirements.
ESR and capacitor charge are major contributions to the
output voltage ripple. Assuming that the total output
capacitance is sufficient, then the output voltage ripple is
dominated by the ESR, which can be calculated using
Equation 2.
To meet the 30mV
P-P
output voltage ripple requirement, the
effective ESR should be less than 5m
Ω
.
The output voltage response to a transient load is
contributed from ESL, ESR and the amount of output
capacitance. With V
IN
>>V
OUT
, the amplitude of the voltage
excursions can be approximated using Equation 3:
With 1µH inductor and 0A to 15A step load, the total output
capacitance of 1560µF is required for 80mV output voltage
transient. In the ISL8105BEVAL1Z, ISL8105BEVAL2Z
evaluation board, four of Sanyo’s 2R5TPF470ML are
employed.
Input Capacitor Selection
The input bulk capacitors selection criteria are based on the
capacitance and RMS current capability. The RMS current
rating requirement for the input capacitor is approximated in
Equation 4:
In this application, the RMS current for the input capacitors is
5.4A; therefore, three of Sanyo’s 35ME330AX are used.
Small ceramic capacitors for high frequency decoupling are
also required to control the voltage overshoot across the
MOSFETs.
MOSFET Selection
The ISL8105B requires two N-Channel power MOSFETs as
the main and the synchronous switches. These should be
selected based in r
DS(ON)
, gate supply requirements and
thermal management requirements.
TABLE 1. ISL8105BEVAL1Z, ISL8105BEVAL2Z EVALUATION
BOARD DESIGN PARAMETERS
PARAMETER
MIN
TYP
MAX
Input Voltage (V
IN
)
9.6V
12V
14.4V
Output Voltage (V
OUT
)
1.8V
Output Voltage Ripple (V
RIPPLE
)
30mV
P-P
Continuous Load Current
15A
Efficiency
90
TABLE 2. EVALUATION BOARDS
BOARD NAME
IC
PACKAGE
ISL8105BEVAL1Z
ISL8105BIBZ
8 Ld SOIC
ISL8105BEVAL2Z
ISL8105BIRZ
10 Ld DFN
L
V
IN
V
OUT
–
Δ
I
--------------------------------
V
OUT
V
IN
----------------
×
1
F
SW
------------
×
=
14.4
1.8
–
0.4 15
⋅
--------------------------
1.8
14.4
-----------
×
1
300
3
×
10
----------------------
×
=
0.875
μ
H
=
(EQ. 1)
V
RIPPLE
Δ
I
L
ESR
⋅
=
(EQ. 2)
Δ
V
L I
tran
2
⋅
C
OUT
V
OUT
⋅
-------------------------------------
=
(EQ. 3)
I
IN RMS
,
I
O
2
D
D
2
–
(
)
I
Δ
2
12
--------
D
+
=
D
V
O
VIN
----------
=
(EQ. 4)
Application Note
October 30, 2008
