ISL70001ASEHEV1Z
AN1842 Rev.1.00
Page 5 of 9
Jun 11, 2013
Layout Guidelines
1. Use a four layer PCB with 2 ounce copper.
2. Layer 2 should be a dedicated ground plane and layer 3
should be a dedicated power plane split between VIN and
VOUT.
3. Layers 1 and 4 should be used primarily for signals, but can
also be used to increase the VIN, VOUT and ground planes as
required.
4. Connect all AGND, DGND and PGNDx pins directly to the
ground plane. Connect all PVINx pins directly to the VIN
portion of the power plane.
5. Locate ceramic bypass capacitors as close as possible to U1.
Prioritize the placement of the bypass capacitors on the pins
of U1 in the order shown: REF, SS, AVDD, DVDD, PVINx (C5,
C7), EN, PGOOD, PVINx (C1-C4).
6. Locate the output voltage resistive divider as close as
possible to the FB pin of the IC. The top leg of the divider
should connect directly to the POL (Point Of Load) and the
bottom leg of the resistive divider should connect directly to
AGND. The junction of the resistive divider should connect
directly to the FB pin.
7. Locate the Schottky diode, D1, as close as possible to the LXx
and PGNDx pins of the IC. A smaller Schottky diode may be
used as long as derating requirements are satisfied.
8. Use a small island of copper to connect the LXx pins of U1 to
the inductor, L1, on layers 1 and 4. Void the copper on layers
2 and 3 adjacent to the island to minimize capacitive
coupling. Place most of the island on layer 4 to minimize the
amount of copper that must be voided from the ground layer
(layer 2).
9. Keep all signal traces as short as possible.
10. A small series snubber (R10 and C14) connected from the
LXx pins to the PGNDx pins may be used to damp ringing on
the LXx pins if desired.
11. For optimum thermal performance, place a pattern of vias on
the top layer of the PCB directly underneath U1. Connect the
vias to the ground plane (layer 2), which serves as a heatsink.
Thermal interface material such as a Sil-Pad should be used
to fill the gap between the vias and the bottom of U1 to insure
good thermal contact. Using a Sil-Pad has the added benefit
of raising the bottom of U1 from the PCB surface so that a
slight bend can be added to the leads for strain relief.
12. Refer to Figures 2 through 7 for an example layout.
FIGURE 2. SILK SCREEN TOP