1
®
AN1009.0
ISL6560/62 Evaluation Board
Introduction
The ISL6560/62 Evaluation Board was designed to
accommodate either the ISL6560 or the ISL6562 power
supply controller ICs. CORE voltage is set by a five bit DAC
that is usually programmed by the microprocessor. For this
board, DAC codes are entered via a five position dip switch.
Power supply input voltages may be applied through three
banana posts or an ATX connector on the board. With an
ATX supply the main input voltage to the converter is 5V. The
ATX 12V supply powers the ISL6560/62, the HIP6601 gate
drivers and the transient load generator. A toggle switch is
provided on the board to enable the ATX supply.
Converter input voltage via the banana connectors can
range from 5V to 12V. A separate connector supplies 12V to
the ISL6560/62, transient load generator and the gate
drivers as described above.
Figure 1 shows the Evaluation Board. Note the ATX
connector at the top of the board. The ATX power switch
SW2, is located to the right of the connector.
Description
This board was design so that a wide range of input voltages
could be used. Burndy binding posts at the lower end of the
board provide the high current connections for the output
load.
Just above the output connectors is a pulse generator to
provide 40A transient loading to verify response to pulse
loading of the supply. Scope probe connectors monitor the
current pulse, and output voltage.
Extra output capacitor locations are available to modify the
output capacitor configuration or type of capacitors. 22
µ
F
ceramic capacitors accompany the bulk electrolytic
capacitors. In an application where the supply is connected
to an active load, high frequency capacitors should be
located as close as possible to the load to help reduce
undesired transient voltage changes at the load.
The ISL6560/62 is located on the left side of the board.
Immediately below the controller IC is the POWER GOOD
monitoring circuit. A dual RED-GREEN LED indicator is
green when the CORE voltage is within the defined data
sheet limits. Figure 13 shows a schematic diagram of the
POWER GOOD monitoring circuit.
ISL6560 and ISL6562
Figure 2 shows a simplified functional block diagram of these
devices, outlining the major differences between the two ICs.
FIGURE 1. EVALUATION BOARD
D/A
+
+
UV
OVP
+
E/A
CMP
PWM1
PWM2
CS+
CS-
GND
REF
VCC
_
VID4
VID3
VID2
VID1
VID0
OSCILLATOR
WRGD
3V REF
BIAS CIRCUITS
UVLO and
CT
CONTROL
LOGIC
CS Threshold Voltage
ISL6560 - VRM 9.0
ISL6562 - VRM 8.5
ISL6560 - 157mV
DAC Codes
FB
COMP
X0.82
X1.24
-
-
+
-
-
ISL6562 - 79mV
FIGURE 2. SIMPLIFIED BLOCK DIAGRAM SHOWING
MAJOR DEVICE DIFFERENCES
Application Note
April 2002
Author: Hal Wittlinger
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
