2
AN1270.0
September 27, 2006
Scope Probe Connections
Another topic to cover before getting started is the evaluation
board physical connections for waveform observations. On
each schematic version you will see a component with pins
designated as DIF+ and DIF-. This is not an active
component but a dual pin header physically design to
accommodate connection of active differential probes. This
will minimize ground lead inductance and capacitive loading
while make waveform observations. However, the user must
also be mindful of max voltage limitations when using these
types of probes. The ISL5514x comparators cover a large
voltage range, so double check the probe’s specifications.
Scope probe test points (TP) are positioned across all
inputs, outputs and VCC and VEE.
BNC Connections
This series of evaluation boards also provides BNC
connections for input and output signals. A key point to
remember is the ISL55141, ISL55142, ISL55143 comparator
outputs (QA/QB) operate with the VOH voltage as a High
and VOL voltage as a Low. QA/QB BNC’s, which are
connected to the outputs, have the shield connected to the
VOL voltage bus. Keep this in mind when making BNC
connections to avoid connecting the GND shield of the BNC
inputs to the VOL shield of the BNC outputs.
Also note that the comparator outputs have 50
Ω
terminations that you may need to remove for your
application.
Power-Down Feature
All boards provide the same capability for testing the
power-down feature. A SPDT- center OFF switch is provided
for manual testing of the feature. In one position the PD input
is connected to VCC (Power-down enabled). In the other
position the PD Input is connected to VEE (power-down
disabled).
FIGURE 3. DUAL1” SPACED PINS ARE PLACED ON THE
EVALUATION BOARDS FOR DIFFERENTIAL
PROBE CONNECTIONS
R1
50
Ω
DIF--
DIF+
TP01-QA_VOL
QA_J3
QA0
VOL
R14
0
Ω
R18
0
Ω
R20
NOT POPULATED
DIF--
DIF+
TP07-VINP
VINP_J8
GND
GND
DIF--
DIF+
SCOPE PROBE CONNECTIONS
FIGURE 4. BNC CONNECTIONS ON THE QA/QB
COMPARATOR OUTPUTS HAVE THE SHIELD
CONNECTED TO THE VOL BUS. NOTE: YOU MAY
WISH TO REMOVE THE 50
Ω
TERMINATIONS.
R1
50
Ω
R2
50
Ω
DIF--
DIF+
TP01-QA_VOL
DIF--
DIF+
TP02-QB_VOL
QA_J3
QB_J4
QA0
QB0
QB0
QA0
VOH
VOL
VOL
VOL
PD
14
CVB
12
VINP
11
CVA
10
VCC
9
VEE
8
VEE
1
QA
4
QB
5
VOL
6
VOH
7
ISL55141_TSSOP
FIGURE 5. BNC CONNECTIONS ON THE HIGH SPEED VINP
PINS HAVE THE SHIELD CONNECTED TO GND.
NOTE: TWO SMD SERIES POSITIONS PLUS ONE
POSITION TO GROUND ARE AVAILABLE FOR
USER SPECIFIC CIRCUITRY.
VCC
CVB_BUS
CVA_BUS
VINP
VEE
_TSSOP
R14
0
Ω
R18
0
Ω
R20
NOT POPULATED
DIF--
DIF+
TP07-VINP
VINP_J8
GND
VINP
GND
PD
14
CVB
12
VINP
11
CVA
10
VCC
9
VEE
8
FIGURE 6. ALL ISL5514X EVALUATION BOARDS HAVE THE
SAME POWER-DOWN CIRCUITRY.
S1 - POWER-DOWN CONTROL
SPDT - CENTER OFF
VDD
GND
PD - BN_J5
VEE
PD
PD
14
CVB
12
VINP
11
CVA
10
VCC
9
VEE
8
VEE
1
QA
4
QB
5
VOL
6
VOH
7
ISL55141_TSSOP
Application Note 1270
