1
®
AN1289.0
ISL28470EVAL1Z Evaluation
Board User’s Guide
Introduction
The ISL28470EVAL1Z evaluation board is a design platform
containing all the circuitry needed to characterize critical
performance parameters of the ISL28470 Quad
Instrumentation Amplifier using a variety of user defined test
circuits.
The ISL28470 is a quad channel instrumentation amplifier
optimized for 2.4V to 5V single supplies. The device features
an Input Range Enhancement Circuit (IREC) which
maintains CMRR performance for input voltages equal to the
positive supply and down to 50mV above the negative
supply rail. The input signal is capable of swinging above the
positive supply rail and to the negative supply with only a
slight degradation of the CMRR performance. The output
operation is rail to rail. The ISL28270 is compensated for a
minimum gain of 100.
Reference Documents
• ISL28470 Data Sheet, FN6260
Evaluation Board Key Features
The ISL28470EVAL1Z is designed to be operated from a
single supply (+2.4VDC to +5VDC), or from split supplies
(±1.2VDC to ±2/5V). The board is configured for 4
independent instrumentation amplifiers connected for a
closed loop gain of 101 with inverting and non-inverting high
impedance terminated with 100k resistors to ground. Each
amplifier contains it’s own VREF input to establish an input
common mode reference. An ENABLE select switch is
provided for each amplifier to be used to save power by
powering the device down.
Power Supplies
(Refer to Figure 1)
External power connections are made through the +V, -V
and Ground connections on the evaluation board. For single
supply operation, the -V and Ground pins are tied together to
the power supply negative terminal. For split supplies, +V
and -V terminals connect to their respective power supply
terminals. De-coupling capacitors, C
1
and C
2
, connect to
ground through R
1
and R
2
, 0
Ω
resistors. Resistors R
3
and
R
4
are 0
Ω
but can be changed by the user to provide power
supply filtering, or
to r
educe the voltage rate-of-rise to less
than ±1V/µs
.
Anti-reverse diodes D
1
and D
2
protect the
circuit in the case of accidental polarity reversal.
FIGURE 1. POWER SUPPLY CIRCUIT
R
3
R
4
C
10
C
9
D
2
R
1
C
1
C
2
J
3
J
2
J
1
D
1
R
2
GND
V-
V+
V-
V+
VP
0.1µF
0.1µF
VM
1
1
1
1
2
2
2
2
0
0
0
0
4.7µF
4.7µF
+
+
-
+
-
+
IN+
IN-
FB+
FB-
R
F
R
G
VREF(x)
IN+(x)
IN-(x)
GND
100k
Ω
1k
Ω
100k
Ω
100k
Ω
VOUT(x)
1/4 ISL28470
VP
-V
ENABLE
10k
Ω
0
Ω
VM
VCM
IN+
IN-
VREF
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
Application Note
February 12, 2007
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
